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  1. /*
  2.  * Copyright (c) 2006 Martin Decky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ia32xen_mm 
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #ifndef KERN_ia32xen_PAGE_H_
  36. #define KERN_ia32xen_PAGE_H_
  37.  
  38. #include <arch/mm/frame.h>
  39.  
  40. #define PAGE_WIDTH  FRAME_WIDTH
  41. #define PAGE_SIZE   FRAME_SIZE
  42.  
  43. #define PAGE_COLOR_BITS 0           /* dummy */
  44.  
  45. #ifdef KERNEL
  46.  
  47. #ifndef __ASM__
  48. #   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
  49. #   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
  50. #else
  51. #   define KA2PA(x) ((x) - 0x80000000)
  52. #   define PA2KA(x) ((x) + 0x80000000)
  53. #endif
  54.  
  55. /*
  56.  * Implementation of generic 4-level page table interface.
  57.  * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
  58.  */
  59. #define PTL0_ENTRIES_ARCH   1024
  60. #define PTL1_ENTRIES_ARCH   0
  61. #define PTL2_ENTRIES_ARCH   0
  62. #define PTL3_ENTRIES_ARCH   1024
  63.  
  64. #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
  65. #define PTL1_INDEX_ARCH(vaddr)  0
  66. #define PTL2_INDEX_ARCH(vaddr)  0
  67. #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
  68.  
  69. #define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) MA2PA((((pte_t *) (ptl0))[(i)].frame_address) << 12))
  70. #define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
  71. #define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
  72. #define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
  73.  
  74. #define SET_PTL0_ADDRESS_ARCH(ptl0) { \
  75.     mmuext_op_t mmu_ext; \
  76.     \
  77.     mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
  78.     mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
  79.     ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
  80. }
  81.  
  82. #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
  83.     mmuext_op_t mmu_ext; \
  84.     \
  85.     mmu_ext.cmd = MMUEXT_PIN_L1_TABLE; \
  86.     mmu_ext.mfn = ADDR2PFN(PA2MA(a)); \
  87.     ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
  88.     \
  89.     mmu_update_t update; \
  90.     \
  91.     update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
  92.     update.val = PA2MA(a); \
  93.     ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
  94. }
  95.  
  96. #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
  97. #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
  98. #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) { \
  99.     mmu_update_t update; \
  100.     \
  101.     update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl3))[(i)])); \
  102.     update.val = PA2MA(a); \
  103.     ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
  104. }
  105.  
  106. #define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t)(i))
  107. #define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
  108. #define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
  109. #define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t)(i))
  110.  
  111. #define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))
  112. #define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
  113. #define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
  114. #define SET_FRAME_FLAGS_ARCH(ptl3, i, x)        set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))
  115.  
  116. #define PTE_VALID_ARCH(p)           (*((uint32_t *) (p)) != 0)
  117. #define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
  118. #define PTE_GET_FRAME_ARCH(p)           ((p)->frame_address << FRAME_WIDTH)
  119. #define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
  120. #define PTE_EXECUTABLE_ARCH(p)          1
  121.  
  122. #ifndef __ASM__
  123.  
  124. #include <mm/mm.h>
  125. #include <arch/hypercall.h>
  126. #include <arch/interrupt.h>
  127.  
  128. /* Page fault error codes. */
  129.  
  130. /** When bit on this position is 0, the page fault was caused by a not-present page. */
  131. #define PFERR_CODE_P        (1 << 0)
  132.  
  133. /** When bit on this position is 1, the page fault was caused by a write. */
  134. #define PFERR_CODE_RW       (1 << 1)
  135.  
  136. /** When bit on this position is 1, the page fault was caused in user mode. */
  137. #define PFERR_CODE_US       (1 << 2)
  138.  
  139. /** When bit on this position is 1, a reserved bit was set in page directory. */
  140. #define PFERR_CODE_RSVD     (1 << 3)
  141.  
  142. typedef struct {
  143.     uint64_t ptr;      /**< Machine address of PTE */
  144.     union {            /**< New contents of PTE */
  145.         uint64_t val;
  146.         pte_t pte;
  147.     };
  148. } mmu_update_t;
  149.  
  150. typedef struct {
  151.     unsigned int cmd;
  152.     union {
  153.         unsigned long mfn;
  154.         unsigned long linear_addr;
  155.     };
  156.     union {
  157.         unsigned int nr_ents;
  158.         void *vcpumask;
  159.     };
  160. } mmuext_op_t;
  161.  
  162. static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)
  163. {
  164.     return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
  165. }
  166.  
  167. static inline int xen_mmu_update(const mmu_update_t *req, const unsigned int count, unsigned int *success_count, domid_t domid)
  168. {
  169.     return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
  170. }
  171.  
  172. static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count, unsigned int *success_count, domid_t domid)
  173. {
  174.     return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
  175. }
  176.  
  177. static inline int get_pt_flags(pte_t *pt, index_t i)
  178. {
  179.     pte_t *p = &pt[i];
  180.    
  181.     return (
  182.         (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
  183.         (!p->present)<<PAGE_PRESENT_SHIFT |
  184.         p->uaccessible<<PAGE_USER_SHIFT |
  185.         1<<PAGE_READ_SHIFT |
  186.         p->writeable<<PAGE_WRITE_SHIFT |
  187.         1<<PAGE_EXEC_SHIFT |
  188.         p->global<<PAGE_GLOBAL_SHIFT
  189.     );
  190. }
  191.  
  192. static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
  193. {
  194.     pte_t p = pt[i];
  195.    
  196.     p.page_cache_disable = !(flags & PAGE_CACHEABLE);
  197.     p.present = !(flags & PAGE_NOT_PRESENT);
  198.     p.uaccessible = (flags & PAGE_USER) != 0;
  199.     p.writeable = (flags & PAGE_WRITE) != 0;
  200.     p.global = (flags & PAGE_GLOBAL) != 0;
  201.    
  202.     /*
  203.      * Ensure that there is at least one bit set even if the present bit is cleared.
  204.      */
  205.     p.soft_valid = true;
  206.    
  207.     mmu_update_t update;
  208.    
  209.     update.ptr = PA2MA(KA2PA(&(pt[i])));
  210.     update.pte = p;
  211.     xen_mmu_update(&update, 1, NULL, DOMID_SELF);
  212. }
  213.  
  214. extern void page_arch_init(void);
  215. extern void page_fault(int n, istate_t *istate);
  216.  
  217. #endif /* __ASM__ */
  218.  
  219. #endif /* KERNEL */
  220.  
  221. #endif
  222.  
  223. /** @}
  224.  */
  225.