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  1. /*
  2.  * Copyright (C) 2005 Martin Decky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #ifndef __ppc64_ASM_H__
  30. #define __ppc64_ASM_H__
  31.  
  32. #include <arch/types.h>
  33. #include <config.h>
  34.  
  35. /** Enable interrupts.
  36.  *
  37.  * Enable interrupts and return previous
  38.  * value of EE.
  39.  *
  40.  * @return Old interrupt priority level.
  41.  */
  42. static inline ipl_t interrupts_enable(void)
  43. {
  44.     ipl_t v;
  45.     ipl_t tmp;
  46.    
  47.     asm volatile (
  48.         "mfmsr %0\n"
  49.         "mfmsr %1\n"
  50.         "ori %1, %1, 1 << 15\n"
  51.         "mtmsr %1\n"
  52.         : "=r" (v), "=r" (tmp)
  53.     );
  54.     return v;
  55. }
  56.  
  57. /** Disable interrupts.
  58.  *
  59.  * Disable interrupts and return previous
  60.  * value of EE.
  61.  *
  62.  * @return Old interrupt priority level.
  63.  */
  64. static inline ipl_t interrupts_disable(void)
  65. {
  66.     ipl_t v;
  67.     ipl_t tmp;
  68.    
  69.     asm volatile (
  70.         "mfmsr %0\n"
  71.         "mfmsr %1\n"
  72.         "rlwinm %1, %1, 0, 17, 15\n"
  73.         "mtmsr %1\n"
  74.         : "=r" (v), "=r" (tmp)
  75.     );
  76.     return v;
  77. }
  78.  
  79. /** Restore interrupt priority level.
  80.  *
  81.  * Restore EE.
  82.  *
  83.  * @param ipl Saved interrupt priority level.
  84.  */
  85. static inline void interrupts_restore(ipl_t ipl)
  86. {
  87.     ipl_t tmp;
  88.    
  89.     asm volatile (
  90.         "mfmsr %1\n"
  91.         "rlwimi  %0, %1, 0, 17, 15\n"
  92.         "cmpw 0, %0, %1\n"
  93.         "beq 0f\n"
  94.         "mtmsr %0\n"
  95.         "0:\n"
  96.         : "=r" (ipl), "=r" (tmp)
  97.         : "0" (ipl)
  98.         : "cr0"
  99.     );
  100. }
  101.  
  102. /** Return interrupt priority level.
  103.  *
  104.  * Return EE.
  105.  *
  106.  * @return Current interrupt priority level.
  107.  */
  108. static inline ipl_t interrupts_read(void)
  109. {
  110.     ipl_t v;
  111.    
  112.     asm volatile (
  113.         "mfmsr %0\n"
  114.         : "=r" (v)
  115.     );
  116.     return v;
  117. }
  118.  
  119. /** Return base address of current stack.
  120.  *
  121.  * Return the base address of the current stack.
  122.  * The stack is assumed to be STACK_SIZE bytes long.
  123.  * The stack must start on page boundary.
  124.  */
  125. static inline __address get_stack_base(void)
  126. {
  127.     __address v;
  128.    
  129.     asm volatile (
  130.         "and %0, %%sp, %1\n"
  131.         : "=r" (v)
  132.         : "r" (~(STACK_SIZE - 1))
  133.     );
  134.     return v;
  135. }
  136.  
  137. static inline void cpu_sleep(void)
  138. {
  139. }
  140.  
  141. static inline void cpu_halt(void)
  142. {
  143.     asm volatile (
  144.         "b 0\n"
  145.     );
  146. }
  147.  
  148. void asm_delay_loop(__u32 t);
  149.  
  150. extern void userspace_asm(__address uspace_uarg, __address stack, __address entry);
  151.  
  152. #endif
  153.