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  1. /*
  2.  * Copyright (c) 2006 Jakub Jermar
  3.  * Copyright (c) 2009 Pavel Rimsky
  4.  * All rights reserved.
  5.  *
  6.  * Redistribution and use in source and binary forms, with or without
  7.  * modification, are permitted provided that the following conditions
  8.  * are met:
  9.  *
  10.  * - Redistributions of source code must retain the above copyright
  11.  *   notice, this list of conditions and the following disclaimer.
  12.  * - Redistributions in binary form must reproduce the above copyright
  13.  *   notice, this list of conditions and the following disclaimer in the
  14.  *   documentation and/or other materials provided with the distribution.
  15.  * - The name of the author may not be used to endorse or promote products
  16.  *   derived from this software without specific prior written permission.
  17.  *
  18.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28.  */
  29.  
  30. /** @addtogroup sparc64mm
  31.  * @{
  32.  */
  33. /** @file
  34.  */
  35.  
  36. #include <arch/mm/as.h>
  37. #include <arch/mm/pagesize.h>
  38. #include <arch/mm/sun4u/tlb.h>
  39. #include <arch/mm/sun4u/tlb.h>
  40. #include <genarch/mm/page_ht.h>
  41. #include <genarch/mm/asid_fifo.h>
  42. #include <debug.h>
  43. #include <config.h>
  44.  
  45. #ifdef CONFIG_TSB
  46. #include <arch/mm/tsb.h>
  47. #include <arch/memstr.h>
  48. #include <arch/asm.h>
  49. #include <mm/frame.h>
  50. #include <bitops.h>
  51. #include <macros.h>
  52. #endif /* CONFIG_TSB */
  53.  
  54. /** Architecture dependent address space init. */
  55. void as_arch_init(void)
  56. {
  57.     if (config.cpu_active == 1) {
  58.         as_operations = &as_ht_operations;
  59.         asid_fifo_init();
  60.     }
  61. }
  62.  
  63. int as_constructor_arch(as_t *as, int flags)
  64. {
  65. #ifdef CONFIG_TSB
  66.     /*
  67.      * The order must be calculated with respect to the emulated
  68.      * 16K page size.
  69.      */
  70.     int order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
  71.         sizeof(tsb_entry_t)) >> FRAME_WIDTH);
  72.  
  73.     uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA);
  74.  
  75.     if (!tsb)
  76.         return -1;
  77.  
  78.     as->arch.itsb = (tsb_entry_t *) tsb;
  79.     as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT *
  80.         sizeof(tsb_entry_t));
  81.  
  82.     memsetb(as->arch.itsb,
  83.         (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * sizeof(tsb_entry_t), 0);
  84. #endif
  85.     return 0;
  86. }
  87.  
  88. int as_destructor_arch(as_t *as)
  89. {
  90. #ifdef CONFIG_TSB
  91.     /*
  92.      * The count must be calculated with respect to the emualted 16K page
  93.      * size.
  94.      */
  95.     count_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
  96.         sizeof(tsb_entry_t)) >> FRAME_WIDTH;
  97.     frame_free(KA2PA((uintptr_t) as->arch.itsb));
  98.     return cnt;
  99. #else
  100.     return 0;
  101. #endif
  102. }
  103.  
  104. int as_create_arch(as_t *as, int flags)
  105. {
  106. #ifdef CONFIG_TSB
  107.     tsb_invalidate(as, 0, (count_t) -1);
  108. #endif
  109.     return 0;
  110. }
  111.  
  112. /** Perform sparc64-specific tasks when an address space becomes active on the
  113.  * processor.
  114.  *
  115.  * Install ASID and map TSBs.
  116.  *
  117.  * @param as Address space.
  118.  */
  119. void as_install_arch(as_t *as)
  120. {
  121. #if 0
  122.     tlb_context_reg_t ctx;
  123.    
  124.     /*
  125.      * Note that we don't and may not lock the address space. That's ok
  126.      * since we only read members that are currently read-only.
  127.      *
  128.      * Moreover, the as->asid is protected by asidlock, which is being held.
  129.      */
  130.    
  131.     /*
  132.      * Write ASID to secondary context register. The primary context
  133.      * register has to be set from TL>0 so it will be filled from the
  134.      * secondary context register from the TL=1 code just before switch to
  135.      * userspace.
  136.      */
  137.     ctx.v = 0;
  138.     ctx.context = as->asid;
  139.     mmu_secondary_context_write(ctx.v);
  140.  
  141. #ifdef CONFIG_TSB  
  142.     uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
  143.  
  144.     ASSERT(as->arch.itsb && as->arch.dtsb);
  145.  
  146.     uintptr_t tsb = (uintptr_t) as->arch.itsb;
  147.        
  148.     if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
  149.         /*
  150.          * TSBs were allocated from memory not covered
  151.          * by the locked 4M kernel DTLB entry. We need
  152.          * to map both TSBs explicitly.
  153.          */
  154.         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
  155.         dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
  156.     }
  157.        
  158.     /*
  159.      * Setup TSB Base registers.
  160.      */
  161.     tsb_base_reg_t tsb_base;
  162.        
  163.     tsb_base.value = 0;
  164.     tsb_base.size = TSB_SIZE;
  165.     tsb_base.split = 0;
  166.  
  167.     tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
  168.     itsb_base_write(tsb_base.value);
  169.     tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
  170.     dtsb_base_write(tsb_base.value);
  171.    
  172. #if defined (US3)
  173.     /*
  174.      * Clear the extension registers.
  175.      * In HelenOS, primary and secondary context registers contain
  176.      * equal values and kernel misses (context 0, ie. the nucleus context)
  177.      * are excluded from the TSB miss handler, so it makes no sense
  178.      * to have separate TSBs for primary, secondary and nucleus contexts.
  179.      * Clearing the extension registers will ensure that the value of the
  180.      * TSB Base register will be used as an address of TSB, making the code
  181.      * compatible with the US port.
  182.      */
  183.     itsb_primary_extension_write(0);
  184.     itsb_nucleus_extension_write(0);
  185.     dtsb_primary_extension_write(0);
  186.     dtsb_secondary_extension_write(0);
  187.     dtsb_nucleus_extension_write(0);
  188. #endif
  189. #endif
  190. #endif
  191. }
  192.  
  193. /** Perform sparc64-specific tasks when an address space is removed from the
  194.  * processor.
  195.  *
  196.  * Demap TSBs.
  197.  *
  198.  * @param as Address space.
  199.  */
  200. void as_deinstall_arch(as_t *as)
  201. {
  202.  
  203.     /*
  204.      * Note that we don't and may not lock the address space. That's ok
  205.      * since we only read members that are currently read-only.
  206.      *
  207.      * Moreover, the as->asid is protected by asidlock, which is being held.
  208.      */
  209.  
  210. #ifdef CONFIG_TSB
  211.     uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
  212.  
  213.     ASSERT(as->arch.itsb && as->arch.dtsb);
  214.  
  215.     uintptr_t tsb = (uintptr_t) as->arch.itsb;
  216.        
  217.     if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
  218.         /*
  219.          * TSBs were allocated from memory not covered
  220.          * by the locked 4M kernel DTLB entry. We need
  221.          * to demap the entry installed by as_install_arch().
  222.          */
  223.         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
  224.     }
  225. #endif
  226. }
  227.  
  228. /** @}
  229.  */
  230.