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  1. /*
  2.  * Copyright (c) 2009 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup genarch
  30.  * @{
  31.  */
  32. /**
  33.  * @file
  34.  * @brief i8042 processor driver
  35.  *
  36.  * It takes care of the i8042 serial communication.
  37.  *
  38.  */
  39.  
  40. #include <genarch/drivers/i8042/i8042.h>
  41. #include <genarch/drivers/legacy/ia32/io.h>
  42. #include <arch/asm.h>
  43. #include <console/chardev.h>
  44. #include <mm/slab.h>
  45. #include <ddi/device.h>
  46.  
  47. #define i8042_SET_COMMAND  0x60
  48. #define i8042_COMMAND      0x69
  49. #define i8042_CPU_RESET    0xfe
  50.  
  51. #define i8042_BUFFER_FULL_MASK  0x01
  52. #define i8042_WAIT_MASK         0x02
  53.  
  54. static irq_ownership_t i8042_claim(irq_t *irq)
  55. {
  56.     i8042_instance_t *i8042_instance = irq->instance;
  57.     i8042_t *dev = i8042_instance->i8042;
  58.    
  59.     if (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
  60.         return IRQ_ACCEPT;
  61.     else
  62.         return IRQ_DECLINE;
  63. }
  64.  
  65. static void i8042_irq_handler(irq_t *irq)
  66. {
  67.     i8042_instance_t *instance = irq->instance;
  68.     i8042_t *dev = instance->i8042;
  69.     uint8_t status;
  70.    
  71.     if (((status = pio_read_8(&dev->status)) & i8042_BUFFER_FULL_MASK)) {
  72.         uint8_t data = pio_read_8(&dev->data);
  73.         indev_push_character(instance->kbrdin, data);
  74.     }
  75. }
  76.  
  77. /**< Clear input buffer. */
  78. static void i8042_clear_buffer(i8042_t *dev)
  79. {
  80.     while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
  81.         (void) pio_read_8(&dev->data);
  82. }
  83.  
  84. /** Initialize i8042. */
  85. i8042_instance_t *i8042_init(i8042_t *dev, inr_t inr)
  86. {
  87.     i8042_instance_t *instance
  88.         = malloc(sizeof(i8042_instance_t), FRAME_ATOMIC);
  89.     if (instance) {
  90.         instance->i8042 = dev;
  91.         instance->kbrdin = NULL;
  92.        
  93.         irq_initialize(&instance->irq);
  94.         instance->irq.devno = device_assign_devno();
  95.         instance->irq.inr = inr;
  96.         instance->irq.claim = i8042_claim;
  97.         instance->irq.handler = i8042_irq_handler;
  98.         instance->irq.instance = instance;
  99.        
  100.     }
  101.    
  102.     return instance;
  103. }
  104.  
  105. void i8042_wire(i8042_instance_t *instance, indev_t *kbrdin)
  106. {
  107.     ASSERT(instance);
  108.     ASSERT(kbrdin);
  109.    
  110.     instance->kbrdin = kbrdin;
  111.     irq_register(&instance->irq);
  112.     i8042_clear_buffer(instance->i8042);
  113. }
  114.  
  115. /* Reset CPU by pulsing pin 0 */
  116. void i8042_cpu_reset(i8042_t *dev)
  117. {
  118.     interrupts_disable();
  119.    
  120.     i8042_clear_buffer(dev);
  121.    
  122.     /* Reset CPU */
  123.     pio_write_8(&dev->status, i8042_CPU_RESET);
  124. }
  125.  
  126. /** @}
  127.  */
  128.