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  1. /*
  2.  * Copyright (c) 2005 Ondrej Palkovsky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup amd64
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36.  
  37. #include <arch/types.h>
  38.  
  39. #include <config.h>
  40.  
  41. #include <proc/thread.h>
  42. #include <arch/drivers/ega.h>
  43. #include <arch/drivers/vesa.h>
  44. #include <genarch/kbd/i8042.h>
  45. #include <arch/drivers/i8254.h>
  46. #include <arch/drivers/i8259.h>
  47.  
  48. #ifdef CONFIG_SMP
  49. #include <arch/smp/apic.h>
  50. #endif
  51.  
  52. #include <arch/bios/bios.h>
  53. #include <arch/cpu.h>
  54. #include <print.h>
  55. #include <arch/cpuid.h>
  56. #include <genarch/acpi/acpi.h>
  57. #include <panic.h>
  58. #include <interrupt.h>
  59. #include <arch/syscall.h>
  60. #include <arch/debugger.h>
  61. #include <syscall/syscall.h>
  62. #include <console/console.h>
  63. #include <ddi/irq.h>
  64. #include <ddi/device.h>
  65.  
  66.  
  67. /** Disable I/O on non-privileged levels
  68.  *
  69.  * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
  70.  */
  71. static void clean_IOPL_NT_flags(void)
  72. {
  73.     asm (
  74.         "pushfq\n"
  75.         "pop %%rax\n"
  76.         "and $~(0x7000), %%rax\n"
  77.         "pushq %%rax\n"
  78.         "popfq\n"
  79.         :
  80.         :
  81.         : "%rax"
  82.     );
  83. }
  84.  
  85. /** Disable alignment check
  86.  *
  87.  * Clean AM(18) flag in CR0 register
  88.  */
  89. static void clean_AM_flag(void)
  90. {
  91.     asm (
  92.         "mov %%cr0, %%rax\n"
  93.         "and $~(0x40000), %%rax\n"
  94.         "mov %%rax, %%cr0\n"
  95.         :
  96.         :
  97.         : "%rax"
  98.     );
  99. }
  100.  
  101. void arch_pre_mm_init(void)
  102. {
  103.     /* Enable no-execute pages */
  104.     set_efer_flag(AMD_NXE_FLAG);
  105.     /* Enable FPU */
  106.     cpu_setup_fpu();
  107.  
  108.     /* Initialize segmentation */
  109.     pm_init();
  110.    
  111.     /* Disable I/O on nonprivileged levels
  112.      * clear the NT (nested-thread) flag
  113.      */
  114.     clean_IOPL_NT_flags();
  115.     /* Disable alignment check */
  116.     clean_AM_flag();
  117.  
  118.     if (config.cpu_active == 1) {
  119.         interrupt_init();
  120.         bios_init();
  121.        
  122.         /* PIC */
  123.         i8259_init();
  124.     }
  125. }
  126.  
  127.  
  128. void arch_post_mm_init(void)
  129. {
  130.     if (config.cpu_active == 1) {
  131.         /* Initialize IRQ routing */
  132.         irq_init(IRQ_COUNT, IRQ_COUNT);
  133.        
  134.         /* hard clock */
  135.         i8254_init();
  136.                
  137. #ifdef CONFIG_FB
  138.         if (vesa_present())
  139.             vesa_init();
  140.         else
  141. #endif
  142.             ega_init(); /* video */
  143.        
  144.         /* Enable debugger */
  145.         debugger_init();
  146.         /* Merge all memory zones to 1 big zone */
  147.         zone_merge_all();
  148.     }
  149.    
  150.     /* Setup fast SYSCALL/SYSRET */
  151.     syscall_setup_cpu();
  152. }
  153.  
  154. void arch_post_cpu_init()
  155. {
  156. #ifdef CONFIG_SMP
  157.     if (config.cpu_active > 1) {
  158.         l_apic_init();
  159.         l_apic_debug();
  160.     }
  161. #endif
  162. }
  163.  
  164. void arch_pre_smp_init(void)
  165. {
  166.     if (config.cpu_active == 1) {
  167. #ifdef CONFIG_SMP
  168.         acpi_init();
  169. #endif /* CONFIG_SMP */
  170.     }
  171. }
  172.  
  173. void arch_post_smp_init(void)
  174. {
  175.     /* keyboard controller */
  176.     i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
  177. }
  178.  
  179. void calibrate_delay_loop(void)
  180. {
  181.     i8254_calibrate_delay_loop();
  182.     if (config.cpu_active == 1) {
  183.         /*
  184.          * This has to be done only on UP.
  185.          * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
  186.          */
  187.         i8254_normal_operation();
  188.     }
  189. }
  190.  
  191. /** Set thread-local-storage pointer
  192.  *
  193.  * TLS pointer is set in FS register. Unfortunately the 64-bit
  194.  * part can be set only in CPL0 mode.
  195.  *
  196.  * The specs say, that on %fs:0 there is stored contents of %fs register,
  197.  * we need not to go to CPL0 to read it.
  198.  */
  199. unative_t sys_tls_set(unative_t addr)
  200. {
  201.     THREAD->arch.tls = addr;
  202.     write_msr(AMD_MSR_FS, addr);
  203.     return 0;
  204. }
  205.  
  206. /** Acquire console back for kernel
  207.  *
  208.  */
  209. void arch_grab_console(void)
  210. {
  211.     i8042_grab();
  212. }
  213. /** Return console to userspace
  214.  *
  215.  */
  216. void arch_release_console(void)
  217. {
  218.     i8042_release();
  219. }
  220.  
  221. /** @}
  222.  */
  223.