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  1. /*
  2.  * Copyright (c) 2006 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup sparc64mm
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch/mm/as.h>
  36. #include <arch/mm/tlb.h>
  37. #include <genarch/mm/page_ht.h>
  38. #include <genarch/mm/asid_fifo.h>
  39. #include <debug.h>
  40. #include <config.h>
  41.  
  42. #ifdef CONFIG_TSB
  43. #include <arch/mm/tsb.h>
  44. #include <arch/memstr.h>
  45. #include <synch/mutex.h>
  46. #include <arch/asm.h>
  47. #include <mm/frame.h>
  48. #include <bitops.h>
  49. #include <macros.h>
  50. #endif /* CONFIG_TSB */
  51.  
  52. /** Architecture dependent address space init. */
  53. void as_arch_init(void)
  54. {
  55.     if (config.cpu_active == 1) {
  56.         as_operations = &as_ht_operations;
  57.         asid_fifo_init();
  58.     }
  59. }
  60.  
  61. int as_constructor_arch(as_t *as, int flags)
  62. {
  63. #ifdef CONFIG_TSB
  64.     /*
  65.      * The order must be calculated with respect to the emulated
  66.      * 16K page size.
  67.      */
  68.     int order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
  69.         sizeof(tsb_entry_t)) >> FRAME_WIDTH);
  70.     uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA);
  71.  
  72.     if (!tsb)
  73.         return -1;
  74.  
  75.     as->arch.itsb = (tsb_entry_t *) tsb;
  76.     as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT *
  77.         sizeof(tsb_entry_t));
  78.     memsetb((uintptr_t) as->arch.itsb,
  79.         (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * sizeof(tsb_entry_t), 0);
  80. #endif
  81.     return 0;
  82. }
  83.  
  84. int as_destructor_arch(as_t *as)
  85. {
  86. #ifdef CONFIG_TSB
  87.     /*
  88.      * The count must be calculated with respect to the emualted 16K page
  89.      * size.
  90.      */
  91.     count_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
  92.         sizeof(tsb_entry_t)) >> FRAME_WIDTH;
  93.     frame_free(KA2PA((uintptr_t) as->arch.itsb));
  94.     return cnt;
  95. #else
  96.     return 0;
  97. #endif
  98. }
  99.  
  100. int as_create_arch(as_t *as, int flags)
  101. {
  102. #ifdef CONFIG_TSB
  103.     ipl_t ipl;
  104.  
  105.     ipl = interrupts_disable();
  106.     mutex_lock_active(&as->lock);   /* completely unnecessary, but polite */
  107.     tsb_invalidate(as, 0, (count_t) -1);
  108.     mutex_unlock(&as->lock);
  109.     interrupts_restore(ipl);
  110. #endif
  111.     return 0;
  112. }
  113.  
  114. /** Perform sparc64-specific tasks when an address space becomes active on the
  115.  * processor.
  116.  *
  117.  * Install ASID and map TSBs.
  118.  *
  119.  * @param as Address space.
  120.  */
  121. void as_install_arch(as_t *as)
  122. {
  123.     tlb_context_reg_t ctx;
  124.    
  125.     /*
  126.      * Note that we don't lock the address space.
  127.      * That's correct - we can afford it here
  128.      * because we only read members that are
  129.      * currently read-only.
  130.      */
  131.    
  132.     /*
  133.      * Write ASID to secondary context register.
  134.      * The primary context register has to be set
  135.      * from TL>0 so it will be filled from the
  136.      * secondary context register from the TL=1
  137.      * code just before switch to userspace.
  138.      */
  139.     ctx.v = 0;
  140.     ctx.context = as->asid;
  141.     mmu_secondary_context_write(ctx.v);
  142.  
  143. #ifdef CONFIG_TSB  
  144.     uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
  145.  
  146.     ASSERT(as->arch.itsb && as->arch.dtsb);
  147.  
  148.     uintptr_t tsb = (uintptr_t) as->arch.itsb;
  149.        
  150.     if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
  151.         /*
  152.          * TSBs were allocated from memory not covered
  153.          * by the locked 4M kernel DTLB entry. We need
  154.          * to map both TSBs explicitly.
  155.          */
  156.         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
  157.         dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
  158.     }
  159.        
  160.     /*
  161.      * Setup TSB Base registers.
  162.      */
  163.     tsb_base_reg_t tsb_base;
  164.        
  165.     tsb_base.value = 0;
  166.     tsb_base.size = TSB_SIZE;
  167.     tsb_base.split = 0;
  168.  
  169.     tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
  170.     itsb_base_write(tsb_base.value);
  171.     tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
  172.     dtsb_base_write(tsb_base.value);
  173. #endif
  174. }
  175.  
  176. /** Perform sparc64-specific tasks when an address space is removed from the
  177.  * processor.
  178.  *
  179.  * Demap TSBs.
  180.  *
  181.  * @param as Address space.
  182.  */
  183. void as_deinstall_arch(as_t *as)
  184. {
  185.  
  186.     /*
  187.      * Note that we don't lock the address space.
  188.      * That's correct - we can afford it here
  189.      * because we only read members that are
  190.      * currently read-only.
  191.      */
  192.  
  193. #ifdef CONFIG_TSB
  194.     uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
  195.  
  196.     ASSERT(as->arch.itsb && as->arch.dtsb);
  197.  
  198.     uintptr_t tsb = (uintptr_t) as->arch.itsb;
  199.        
  200.     if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
  201.         /*
  202.          * TSBs were allocated from memory not covered
  203.          * by the locked 4M kernel DTLB entry. We need
  204.          * to demap the entry installed by as_install_arch().
  205.          */
  206.         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
  207.     }
  208. #endif
  209. }
  210.  
  211. /** @}
  212.  */
  213.