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  1. /*
  2.  * Copyright (c) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup mips32
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36. #include <arch/boot.h>
  37. #include <arch/cp0.h>
  38. #include <arch/exception.h>
  39. #include <mm/as.h>
  40.  
  41. #include <userspace.h>
  42. #include <arch/console.h>
  43. #include <memstr.h>
  44. #include <proc/thread.h>
  45. #include <proc/uarg.h>
  46. #include <print.h>
  47. #include <syscall/syscall.h>
  48. #include <sysinfo/sysinfo.h>
  49.  
  50. #include <arch/interrupt.h>
  51. #include <console/chardev.h>
  52. #include <arch/barrier.h>
  53. #include <arch/debugger.h>
  54. #include <genarch/fb/fb.h>
  55. #include <genarch/fb/visuals.h>
  56. #include <macros.h>
  57. #include <ddi/device.h>
  58.  
  59. #include <arch/asm/regname.h>
  60.  
  61. /* Size of the code jumping to the exception handler code
  62.  * - J+NOP
  63.  */
  64. #define EXCEPTION_JUMP_SIZE    8
  65.  
  66. #define TLB_EXC ((char *) 0x80000000)
  67. #define NORM_EXC ((char *) 0x80000180)
  68. #define CACHE_EXC ((char *) 0x80000100)
  69.  
  70.  
  71. /* Why the linker moves the variable 64K away in assembler
  72.  * when not in .text section ????????
  73.  */
  74. uintptr_t supervisor_sp __attribute__ ((section (".text")));
  75. /* Stack pointer saved when entering user mode */
  76. /* TODO: How do we do it on SMP system???? */
  77. bootinfo_t bootinfo __attribute__ ((section (".text")));
  78.  
  79. void arch_pre_main(void)
  80. {
  81.     /* Setup usermode */
  82.     init.cnt = bootinfo.cnt;
  83.    
  84.     uint32_t i;
  85.    
  86.     for (i = 0; i < bootinfo.cnt; i++) {
  87.         init.tasks[i].addr = bootinfo.tasks[i].addr;
  88.         init.tasks[i].size = bootinfo.tasks[i].size;
  89.     }
  90. }
  91.  
  92. void arch_pre_mm_init(void)
  93. {
  94.     /* It is not assumed by default */
  95.     interrupts_disable();
  96.    
  97.     /* Initialize dispatch table */
  98.     exception_init();
  99.  
  100.     /* Copy the exception vectors to the right places */
  101.     memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
  102.     smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
  103.     memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
  104.     smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
  105.     memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
  106.     smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
  107.    
  108.     /*
  109.      * Switch to BEV normal level so that exception vectors point to the
  110.      * kernel. Clear the error level.
  111.      */
  112.     cp0_status_write(cp0_status_read() &
  113.         ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
  114.    
  115.     /*
  116.      * Mask all interrupts
  117.      */
  118.     cp0_mask_all_int();
  119.    
  120.     debugger_init();
  121. }
  122.  
  123. void arch_post_mm_init(void)
  124. {
  125.     interrupt_init();
  126.     console_init(device_assign_devno());
  127. #ifdef CONFIG_FB
  128.     /* GXemul framebuffer */
  129.     fb_properties_t gxemul_prop = {
  130.         .addr = 0x12000000,
  131.         .offset = 0,
  132.         .x = 640,
  133.         .y = 480,
  134.         .scan = 1920,
  135.         .visual = VISUAL_BGR_8_8_8,
  136.     };
  137.     fb_init(&gxemul_prop);
  138. #endif
  139.  
  140. #ifdef MACHINE_msim
  141.     sysinfo_set_item_val("machine.msim", NULL, 1);
  142. #endif
  143.  
  144. #ifdef MACHINE_simics
  145.     sysinfo_set_item_val("machine.simics", NULL, 1);
  146. #endif
  147.  
  148. #ifdef MACHINE_bgxemul
  149.     sysinfo_set_item_val("machine.bgxemul", NULL, 1);
  150. #endif
  151.  
  152. #ifdef MACHINE_lgxemul
  153.     sysinfo_set_item_val("machine.lgxemul", NULL, 1);
  154. #endif
  155. }
  156.  
  157. void arch_post_cpu_init(void)
  158. {
  159. }
  160.  
  161. void arch_pre_smp_init(void)
  162. {
  163. }
  164.  
  165. void arch_post_smp_init(void)
  166. {
  167. }
  168.  
  169. void calibrate_delay_loop(void)
  170. {
  171. }
  172.  
  173. void userspace(uspace_arg_t *kernel_uarg)
  174. {
  175.     /* EXL = 1, UM = 1, IE = 1 */
  176.     cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
  177.         cp0_status_um_bit | cp0_status_ie_enabled_bit));
  178.     cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
  179.     userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
  180.         (uintptr_t) kernel_uarg->uspace_uarg,
  181.         (uintptr_t) kernel_uarg->uspace_entry);
  182.    
  183.     while (1);
  184. }
  185.  
  186. /** Perform mips32 specific tasks needed before the new task is run. */
  187. void before_task_runs_arch(void)
  188. {
  189. }
  190.  
  191. /** Perform mips32 specific tasks needed before the new thread is scheduled. */
  192. void before_thread_runs_arch(void)
  193. {
  194.     supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
  195.         SP_DELTA];
  196. }
  197.  
  198. void after_thread_ran_arch(void)
  199. {
  200. }
  201.  
  202. /** Set thread-local-storage pointer
  203.  *
  204.  * We have it currently in K1, it is
  205.  * possible to have it separately in the future.
  206.  */
  207. unative_t sys_tls_set(unative_t addr)
  208. {
  209.     return 0;
  210. }
  211.  
  212. void arch_reboot(void)
  213. {
  214.     ___halt();
  215.    
  216.     while (1);
  217. }
  218.  
  219. /** Construct function pointer
  220.  *
  221.  * @param fptr   function pointer structure
  222.  * @param addr   function address
  223.  * @param caller calling function address
  224.  *
  225.  * @return address of the function pointer
  226.  *
  227.  */
  228. void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
  229. {
  230.     return addr;
  231. }
  232.  
  233. /** @}
  234.  */
  235.