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  1. /*
  2.  * Copyright (c) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ia64
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36. #include <arch/ski/ski.h>
  37. #include <arch/drivers/it.h>
  38. #include <arch/interrupt.h>
  39. #include <arch/barrier.h>
  40. #include <arch/asm.h>
  41. #include <arch/register.h>
  42. #include <arch/types.h>
  43. #include <arch/context.h>
  44. #include <arch/stack.h>
  45. #include <arch/mm/page.h>
  46. #include <mm/as.h>
  47. #include <config.h>
  48. #include <userspace.h>
  49. #include <console/console.h>
  50. #include <proc/uarg.h>
  51. #include <syscall/syscall.h>
  52. #include <ddi/irq.h>
  53. #include <ddi/device.h>
  54. #include <arch/bootinfo.h>
  55. #include <genarch/drivers/legacy/ia32/io.h>
  56. #include <genarch/drivers/ega/ega.h>
  57. #include <genarch/kbrd/kbrd.h>
  58. #include <genarch/srln/srln.h>
  59. #include <genarch/drivers/i8042/i8042.h>
  60. #include <genarch/drivers/ns16550/ns16550.h>
  61. #include <arch/drivers/kbd.h>
  62. #include <smp/smp.h>
  63. #include <smp/ipi.h>
  64. #include <arch/atomic.h>
  65. #include <panic.h>
  66. #include <print.h>
  67. #include <sysinfo/sysinfo.h>
  68. #include <string.h>
  69.  
  70. /* NS16550 as a COM 1 */
  71. #define NS16550_IRQ  (4 + LEGACY_INTERRUPT_BASE)
  72.  
  73. bootinfo_t *bootinfo;
  74.  
  75. static uint64_t iosapic_base = 0xfec00000;
  76.  
  77. /** Performs ia64-specific initialization before main_bsp() is called. */
  78. void arch_pre_main(void)
  79. {
  80.     /* Setup usermode init tasks. */
  81.  
  82.     unsigned int i;
  83.    
  84.     init.cnt = bootinfo->taskmap.count;
  85.    
  86.     for (i = 0; i < init.cnt; i++) {
  87.         init.tasks[i].addr =
  88.             ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
  89.             VRN_MASK;
  90.         init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
  91.         strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
  92.             CONFIG_TASK_NAME_BUFLEN);
  93.     }
  94. }
  95.  
  96. void arch_pre_mm_init(void)
  97. {
  98.     /*
  99.      * Set Interruption Vector Address (i.e. location of interruption vector
  100.      * table).
  101.      */
  102.     iva_write((uintptr_t) &ivt);
  103.     srlz_d();
  104.    
  105. }
  106.  
  107. static void iosapic_init(void)
  108. {
  109.     uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
  110.     int i;
  111.    
  112.     int myid, myeid;
  113.    
  114.     myid = ia64_get_cpu_id();
  115.     myeid = ia64_get_cpu_eid();
  116.  
  117.     for (i = 0; i < 16; i++) {
  118.         if (i == 2)
  119.             continue;    /* Disable Cascade interrupt */
  120.         ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
  121.         srlz_d();
  122.         ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
  123.         srlz_d();
  124.         ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
  125.         srlz_d();
  126.         ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
  127.             myeid << (48 - 32);
  128.         srlz_d();
  129.     }
  130.  
  131. }
  132.  
  133. void arch_post_mm_init(void)
  134. {
  135.     if (config.cpu_active == 1) {
  136.         iosapic_init();
  137.         irq_init(INR_COUNT, INR_COUNT);
  138.     }
  139.     it_init(); 
  140. }
  141.  
  142. void arch_post_cpu_init(void)
  143. {
  144. }
  145.  
  146. void arch_pre_smp_init(void)
  147. {
  148. }
  149.  
  150. void arch_post_smp_init(void)
  151. {
  152. #ifdef SKI
  153.     indev_t *in;
  154.     in = skiin_init();
  155.     if (in)
  156.         srln_init(in);
  157.     skiout_init();
  158. #endif
  159.    
  160. #ifdef CONFIG_EGA
  161.     ega_init(EGA_BASE, EGA_VIDEORAM);
  162. #endif
  163.    
  164. #ifdef CONFIG_NS16550
  165.     devno_t devno_ns16550 = device_assign_devno();
  166.     indev_t *kbrdin_ns16550
  167.         = ns16550_init((ns16550_t *) NS16550_BASE, devno_ns16550, NS16550_IRQ, NULL, NULL);
  168.     if (kbrdin_ns16550)
  169.         srln_init(kbrdin_ns16550);
  170.    
  171.     sysinfo_set_item_val("kbd", NULL, true);
  172.     sysinfo_set_item_val("kbd.devno", NULL, devno_ns16550);
  173.     sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
  174.     sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
  175.     sysinfo_set_item_val("kbd.address.physical", NULL,
  176.         (uintptr_t) NS16550_BASE);
  177.     sysinfo_set_item_val("kbd.address.kernel", NULL,
  178.         (uintptr_t) NS16550_BASE);
  179. #endif
  180.    
  181. #ifdef CONFIG_I8042
  182.     devno_t devno_i8042 = device_assign_devno();
  183.     indev_t *kbrdin_i8042 = i8042_init((i8042_t *) I8042_BASE, devno_i8042, IRQ_KBD);
  184.     if (kbrdin_i8042)
  185.         kbrd_init(kbrdin_i8042);
  186.    
  187.     sysinfo_set_item_val("kbd", NULL, true);
  188.     sysinfo_set_item_val("kbd.devno", NULL, devno_i8042);
  189.     sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
  190.     sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
  191.     sysinfo_set_item_val("kbd.address.physical", NULL,
  192.         (uintptr_t) I8042_BASE);
  193.     sysinfo_set_item_val("kbd.address.kernel", NULL,
  194.         (uintptr_t) I8042_BASE);
  195. #endif
  196.    
  197.     sysinfo_set_item_val("ia64_iospace", NULL, true);
  198.     sysinfo_set_item_val("ia64_iospace.address", NULL, true);
  199.     sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
  200. }
  201.  
  202.  
  203. /** Enter userspace and never return. */
  204. void userspace(uspace_arg_t *kernel_uarg)
  205. {
  206.     psr_t psr;
  207.     rsc_t rsc;
  208.  
  209.     psr.value = psr_read();
  210.     psr.cpl = PL_USER;
  211.     psr.i = true;           /* start with interrupts enabled */
  212.     psr.ic = true;
  213.     psr.ri = 0;         /* start with instruction #0 */
  214.     psr.bn = 1;         /* start in bank 0 */
  215.  
  216.     asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
  217.     rsc.loadrs = 0;
  218.     rsc.be = false;
  219.     rsc.pl = PL_USER;
  220.     rsc.mode = 3;           /* eager mode */
  221.  
  222.     switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
  223.         ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
  224.         ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
  225.         ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
  226.         (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
  227.  
  228.     while (1)
  229.         ;
  230. }
  231.  
  232. /** Set thread-local-storage pointer.
  233.  *
  234.  * We use r13 (a.k.a. tp) for this purpose.
  235.  */
  236. unative_t sys_tls_set(unative_t addr)
  237. {
  238.         return 0;
  239. }
  240.  
  241. /** Acquire console back for kernel
  242.  *
  243.  */
  244. void arch_grab_console(void)
  245. {
  246. #ifdef SKI
  247.     ski_kbd_grab();
  248. #endif
  249. }
  250.  
  251. /** Return console to userspace
  252.  *
  253.  */
  254. void arch_release_console(void)
  255. {
  256. #ifdef SKI
  257.     ski_kbd_release();
  258. #endif
  259. }
  260.  
  261. void arch_reboot(void)
  262. {
  263.     pio_write_8((ioport8_t *)0x64, 0xfe);
  264.     while (1)
  265.         ;
  266. }
  267.  
  268. /** Construct function pointer
  269.  *
  270.  * @param fptr   function pointer structure
  271.  * @param addr   function address
  272.  * @param caller calling function address
  273.  *
  274.  * @return address of the function pointer
  275.  *
  276.  */
  277. void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
  278. {
  279.     fptr->fnc = (unative_t) addr;
  280.     fptr->gp = ((unative_t *) caller)[1];
  281.    
  282.     return (void *) fptr;
  283. }
  284.  
  285. /** @}
  286.  */
  287.