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  1. /*
  2.  * Copyright (c) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ia64
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36. #include <arch/ski/ski.h>
  37. #include <arch/drivers/it.h>
  38. #include <arch/interrupt.h>
  39. #include <arch/barrier.h>
  40. #include <arch/asm.h>
  41. #include <arch/register.h>
  42. #include <arch/types.h>
  43. #include <arch/context.h>
  44. #include <arch/stack.h>
  45. #include <arch/mm/page.h>
  46. #include <mm/as.h>
  47. #include <config.h>
  48. #include <userspace.h>
  49. #include <console/console.h>
  50. #include <proc/uarg.h>
  51. #include <syscall/syscall.h>
  52. #include <ddi/irq.h>
  53. #include <ddi/device.h>
  54. #include <arch/bootinfo.h>
  55. #include <genarch/drivers/legacy/ia32/io.h>
  56. #include <genarch/drivers/ega/ega.h>
  57. #include <genarch/kbrd/kbrd.h>
  58. #include <genarch/srln/srln.h>
  59. #include <genarch/drivers/i8042/i8042.h>
  60. #include <genarch/drivers/ns16550/ns16550.h>
  61. #include <arch/drivers/kbd.h>
  62. #include <smp/smp.h>
  63. #include <smp/ipi.h>
  64. #include <arch/atomic.h>
  65. #include <panic.h>
  66. #include <print.h>
  67. #include <sysinfo/sysinfo.h>
  68. #include <string.h>
  69.  
  70. /* NS16550 as a COM 1 */
  71. #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
  72.  
  73. bootinfo_t *bootinfo;
  74.  
  75. static uint64_t iosapic_base = 0xfec00000;
  76.  
  77. /** Performs ia64-specific initialization before main_bsp() is called. */
  78. void arch_pre_main(void)
  79. {
  80.     /* Setup usermode init tasks. */
  81.  
  82.     unsigned int i;
  83.    
  84.     init.cnt = bootinfo->taskmap.count;
  85.    
  86.     for (i = 0; i < init.cnt; i++) {
  87.         init.tasks[i].addr =
  88.             ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
  89.             VRN_MASK;
  90.         init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
  91.         strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
  92.             CONFIG_TASK_NAME_BUFLEN);
  93.     }
  94. }
  95.  
  96. void arch_pre_mm_init(void)
  97. {
  98.     /*
  99.      * Set Interruption Vector Address (i.e. location of interruption vector
  100.      * table).
  101.      */
  102.     iva_write((uintptr_t) &ivt);
  103.     srlz_d();
  104.    
  105. }
  106.  
  107. static void iosapic_init(void)
  108. {
  109.     uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
  110.     int i;
  111.    
  112.     int myid, myeid;
  113.    
  114.     myid = ia64_get_cpu_id();
  115.     myeid = ia64_get_cpu_eid();
  116.  
  117.     for (i = 0; i < 16; i++) {
  118.         if (i == 2)
  119.             continue;    /* Disable Cascade interrupt */
  120.         ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
  121.         srlz_d();
  122.         ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
  123.         srlz_d();
  124.         ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
  125.         srlz_d();
  126.         ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
  127.             myeid << (48 - 32);
  128.         srlz_d();
  129.     }
  130.  
  131. }
  132.  
  133. void arch_post_mm_init(void)
  134. {
  135.     if (config.cpu_active == 1) {
  136.         iosapic_init();
  137.         irq_init(INR_COUNT, INR_COUNT);
  138.     }
  139.     it_init(); 
  140. }
  141.  
  142. void arch_post_cpu_init(void)
  143. {
  144. }
  145.  
  146. void arch_pre_smp_init(void)
  147. {
  148. }
  149.  
  150. void arch_post_smp_init(void)
  151. {
  152. #ifdef SKI
  153.     srln_init(stdin);
  154.     ski_console_init(&srlnin);
  155. #endif
  156.    
  157. #ifdef I460GX
  158. #ifdef CONFIG_EGA
  159.     ega_init(EGA_BASE, EGA_VIDEORAM);
  160. #endif
  161.    
  162.     devno_t devno = device_assign_devno();
  163.     inr_t inr;
  164.    
  165. #ifdef CONFIG_NS16550
  166.     inr = NS16550_IRQ;
  167.    
  168.     indev_t *kbrdin = ns16550_init(ns16550_t *) NS16550_BASE, devno, inr, NULL, NULL);
  169.     if (kbrdin)
  170.         srln_init(kbrdin);
  171.    
  172.     sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
  173.     sysinfo_set_item_val("kbd.address.physical", NULL,
  174.         (uintptr_t) NS16550_BASE);
  175.     sysinfo_set_item_val("kbd.address.kernel", NULL,
  176.         (uintptr_t) NS16550_BASE);
  177. #else
  178.     inr = IRQ_KBD;
  179.     /*
  180.      * Initialize the i8042 controller. Then initialize the keyboard
  181.      * module and connect it to i8042. Enable keyboard interrupts.
  182.      */
  183.     indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, devno, irq);
  184.     if (kbrdin) {
  185.         kbrd_init(kbrdin);
  186.         trap_virtual_enable_irqs(1 << inr);
  187.     }
  188.    
  189.     sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
  190.     sysinfo_set_item_val("kbd.address.physical", NULL,
  191.         (uintptr_t) I8042_BASE);
  192.     sysinfo_set_item_val("kbd.address.kernel", NULL,
  193.         (uintptr_t) I8042_BASE);
  194. #endif
  195.     sysinfo_set_item_val("kbd", NULL, true);
  196.     sysinfo_set_item_val("kbd.devno", NULL, devno);
  197.     sysinfo_set_item_val("kbd.inr", NULL, inr);
  198. #endif
  199.    
  200.     sysinfo_set_item_val("ia64_iospace", NULL, true);
  201.     sysinfo_set_item_val("ia64_iospace.address", NULL, true);
  202.     sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
  203. }
  204.  
  205.  
  206. /** Enter userspace and never return. */
  207. void userspace(uspace_arg_t *kernel_uarg)
  208. {
  209.     psr_t psr;
  210.     rsc_t rsc;
  211.  
  212.     psr.value = psr_read();
  213.     psr.cpl = PL_USER;
  214.     psr.i = true;           /* start with interrupts enabled */
  215.     psr.ic = true;
  216.     psr.ri = 0;         /* start with instruction #0 */
  217.     psr.bn = 1;         /* start in bank 0 */
  218.  
  219.     asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
  220.     rsc.loadrs = 0;
  221.     rsc.be = false;
  222.     rsc.pl = PL_USER;
  223.     rsc.mode = 3;           /* eager mode */
  224.  
  225.     switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
  226.         ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
  227.         ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
  228.         ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
  229.         (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
  230.  
  231.     while (1)
  232.         ;
  233. }
  234.  
  235. /** Set thread-local-storage pointer.
  236.  *
  237.  * We use r13 (a.k.a. tp) for this purpose.
  238.  */
  239. unative_t sys_tls_set(unative_t addr)
  240. {
  241.         return 0;
  242. }
  243.  
  244. /** Acquire console back for kernel
  245.  *
  246.  */
  247. void arch_grab_console(void)
  248. {
  249. #ifdef SKI
  250.     ski_kbd_grab();
  251. #endif
  252. }
  253.  
  254. /** Return console to userspace
  255.  *
  256.  */
  257. void arch_release_console(void)
  258. {
  259. #ifdef SKI
  260.     ski_kbd_release();
  261. #endif
  262. }
  263.  
  264. void arch_reboot(void)
  265. {
  266.     pio_write_8((ioport8_t *)0x64, 0xfe);
  267.     while (1)
  268.         ;
  269. }
  270.  
  271. /** Construct function pointer
  272.  *
  273.  * @param fptr   function pointer structure
  274.  * @param addr   function address
  275.  * @param caller calling function address
  276.  *
  277.  * @return address of the function pointer
  278.  *
  279.  */
  280. void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
  281. {
  282.     fptr->fnc = (unative_t) addr;
  283.     fptr->gp = ((unative_t *) caller)[1];
  284.    
  285.     return (void *) fptr;
  286. }
  287.  
  288. /** @}
  289.  */
  290.