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  1. /*
  2.  * Copyright (c) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ia64
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36. #include <arch/ski/ski.h>
  37. #include <arch/drivers/it.h>
  38. #include <arch/interrupt.h>
  39. #include <arch/barrier.h>
  40. #include <arch/asm.h>
  41. #include <arch/register.h>
  42. #include <arch/types.h>
  43. #include <arch/context.h>
  44. #include <arch/stack.h>
  45. #include <arch/mm/page.h>
  46. #include <mm/as.h>
  47. #include <config.h>
  48. #include <userspace.h>
  49. #include <console/console.h>
  50. #include <proc/uarg.h>
  51. #include <syscall/syscall.h>
  52. #include <ddi/irq.h>
  53. #include <ddi/device.h>
  54. #include <arch/bootinfo.h>
  55. #include <genarch/drivers/legacy/ia32/io.h>
  56. #include <genarch/drivers/ega/ega.h>
  57. #include <genarch/kbd/i8042.h>
  58. #include <genarch/kbd/ns16550.h>
  59. #include <smp/smp.h>
  60. #include <smp/ipi.h>
  61. #include <arch/atomic.h>
  62. #include <panic.h>
  63. #include <print.h>
  64. #include <sysinfo/sysinfo.h>
  65.  
  66. /* NS16550 as a COM 1 */
  67. #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
  68.  
  69. bootinfo_t *bootinfo;
  70.  
  71. static uint64_t iosapic_base = 0xfec00000;
  72.  
  73. void arch_pre_main(void)
  74. {
  75.     /* Setup usermode init tasks. */
  76.  
  77.     unsigned int i;
  78.    
  79.     init.cnt = bootinfo->taskmap.count;
  80.    
  81.     for (i = 0; i < init.cnt; i++) {
  82.         init.tasks[i].addr =
  83.             ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
  84.             VRN_MASK;
  85.         init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
  86.     }
  87. }
  88.  
  89. void arch_pre_mm_init(void)
  90. {
  91.     /*
  92.      * Set Interruption Vector Address (i.e. location of interruption vector
  93.      * table).
  94.      */
  95.     iva_write((uintptr_t) &ivt);
  96.     srlz_d();
  97.    
  98. }
  99.  
  100. static void iosapic_init(void)
  101. {
  102.     uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
  103.     int i;
  104.    
  105.     int myid, myeid;
  106.    
  107.     myid = ia64_get_cpu_id();
  108.     myeid = ia64_get_cpu_eid();
  109.  
  110.     for (i = 0; i < 16; i++) {
  111.         if (i == 2)
  112.             continue;    /* Disable Cascade interrupt */
  113.         ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
  114.         srlz_d();
  115.         ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
  116.         srlz_d();
  117.         ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
  118.         srlz_d();
  119.         ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
  120.             myeid << (48 - 32);
  121.         srlz_d();
  122.     }
  123.  
  124. }
  125.  
  126.  
  127. void arch_post_mm_init(void)
  128. {
  129.     if (config.cpu_active == 1) {
  130.         iosapic_init();
  131.         irq_init(INR_COUNT, INR_COUNT);
  132. #ifdef SKI
  133.         ski_init_console();
  134. #else
  135.         ega_init(EGA_BASE, EGA_VIDEORAM);
  136. #endif
  137.     }
  138.     it_init();
  139.        
  140. }
  141.  
  142. void arch_post_cpu_init(void)
  143. {
  144. }
  145.  
  146. void arch_pre_smp_init(void)
  147. {
  148. }
  149.  
  150. void arch_post_smp_init(void)
  151. {
  152.     /*
  153.      * Create thread that polls keyboard.
  154.      */
  155. #ifdef SKI
  156.     thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
  157.     if (!t)
  158.         panic("Cannot create kkbdpoll.");
  159.     thread_ready(t);
  160. #endif     
  161.  
  162. #ifdef I460GX
  163.     devno_t kbd = device_assign_devno();
  164.  
  165. #ifdef CONFIG_NS16550
  166.     (void) ns16550_init((ns16550_t *)NS16550_BASE, kbd, NS16550_IRQ, NULL,
  167.          NULL);
  168. #else
  169.     (void) i8042_init((i8042_t *)I8042_BASE, kbd, IRQ_KBD);
  170. #endif
  171. #endif
  172.  
  173.     sysinfo_set_item_val("ia64_iospace", NULL, true);
  174.     sysinfo_set_item_val("ia64_iospace.address", NULL, true);
  175.     sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
  176. }
  177.  
  178.  
  179. /** Enter userspace and never return. */
  180. void userspace(uspace_arg_t *kernel_uarg)
  181. {
  182.     psr_t psr;
  183.     rsc_t rsc;
  184.  
  185.     psr.value = psr_read();
  186.     psr.cpl = PL_USER;
  187.     psr.i = true;           /* start with interrupts enabled */
  188.     psr.ic = true;
  189.     psr.ri = 0;         /* start with instruction #0 */
  190.     psr.bn = 1;         /* start in bank 0 */
  191.  
  192.     asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
  193.     rsc.loadrs = 0;
  194.     rsc.be = false;
  195.     rsc.pl = PL_USER;
  196.     rsc.mode = 3;           /* eager mode */
  197.  
  198.     switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
  199.         ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
  200.         ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
  201.         ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
  202.         (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
  203.  
  204.     while (1)
  205.         ;
  206. }
  207.  
  208. /** Set thread-local-storage pointer.
  209.  *
  210.  * We use r13 (a.k.a. tp) for this purpose.
  211.  */
  212. unative_t sys_tls_set(unative_t addr)
  213. {
  214.         return 0;
  215. }
  216.  
  217. /** Acquire console back for kernel
  218.  *
  219.  */
  220. void arch_grab_console(void)
  221. {
  222. #ifdef SKI
  223.     ski_kbd_grab();
  224. #endif
  225. }
  226.  
  227. /** Return console to userspace
  228.  *
  229.  */
  230. void arch_release_console(void)
  231. {
  232. #ifdef SKI
  233.     ski_kbd_release();
  234. #endif
  235. }
  236.  
  237. void arch_reboot(void)
  238. {
  239.     pio_write_8((ioport8_t *)0x64, 0xfe);
  240.     while (1)
  241.         ;
  242. }
  243.  
  244. /** Construct function pointer
  245.  *
  246.  * @param fptr   function pointer structure
  247.  * @param addr   function address
  248.  * @param caller calling function address
  249.  *
  250.  * @return address of the function pointer
  251.  *
  252.  */
  253. void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
  254. {
  255.     fptr->fnc = (unative_t) addr;
  256.     fptr->gp = ((unative_t *) caller)[1];
  257.    
  258.     return (void *) fptr;
  259. }
  260.  
  261. /** @}
  262.  */
  263.