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  1. /*
  2.  * Copyright (c) 2005 Ondrej Palkovsky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup amd64
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36.  
  37. #include <arch/types.h>
  38.  
  39. #include <config.h>
  40.  
  41. #include <proc/thread.h>
  42. #include <genarch/drivers/legacy/ia32/io.h>
  43. #include <genarch/drivers/ega/ega.h>
  44. #include <arch/drivers/vesa.h>
  45. #include <genarch/kbd/i8042.h>
  46. #include <arch/drivers/i8254.h>
  47. #include <arch/drivers/i8259.h>
  48.  
  49. #ifdef CONFIG_SMP
  50. #include <arch/smp/apic.h>
  51. #endif
  52.  
  53. #include <arch/bios/bios.h>
  54. #include <arch/cpu.h>
  55. #include <print.h>
  56. #include <arch/cpuid.h>
  57. #include <genarch/acpi/acpi.h>
  58. #include <panic.h>
  59. #include <interrupt.h>
  60. #include <arch/syscall.h>
  61. #include <arch/debugger.h>
  62. #include <syscall/syscall.h>
  63. #include <console/console.h>
  64. #include <ddi/irq.h>
  65. #include <ddi/device.h>
  66. #include <sysinfo/sysinfo.h>
  67.  
  68.  
  69. /** Disable I/O on non-privileged levels
  70.  *
  71.  * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
  72.  */
  73. static void clean_IOPL_NT_flags(void)
  74. {
  75.     asm (
  76.         "pushfq\n"
  77.         "pop %%rax\n"
  78.         "and $~(0x7000), %%rax\n"
  79.         "pushq %%rax\n"
  80.         "popfq\n"
  81.         :
  82.         :
  83.         : "%rax"
  84.     );
  85. }
  86.  
  87. /** Disable alignment check
  88.  *
  89.  * Clean AM(18) flag in CR0 register
  90.  */
  91. static void clean_AM_flag(void)
  92. {
  93.     asm (
  94.         "mov %%cr0, %%rax\n"
  95.         "and $~(0x40000), %%rax\n"
  96.         "mov %%rax, %%cr0\n"
  97.         :
  98.         :
  99.         : "%rax"
  100.     );
  101. }
  102.  
  103. void arch_pre_mm_init(void)
  104. {
  105.     /* Enable no-execute pages */
  106.     set_efer_flag(AMD_NXE_FLAG);
  107.     /* Enable FPU */
  108.     cpu_setup_fpu();
  109.  
  110.     /* Initialize segmentation */
  111.     pm_init();
  112.    
  113.     /* Disable I/O on nonprivileged levels
  114.      * clear the NT (nested-thread) flag
  115.      */
  116.     clean_IOPL_NT_flags();
  117.     /* Disable alignment check */
  118.     clean_AM_flag();
  119.  
  120.     if (config.cpu_active == 1) {
  121.         interrupt_init();
  122.         bios_init();
  123.        
  124.         /* PIC */
  125.         i8259_init();
  126.     }
  127. }
  128.  
  129.  
  130. void arch_post_mm_init(void)
  131. {
  132.     if (config.cpu_active == 1) {
  133.         /* Initialize IRQ routing */
  134.         irq_init(IRQ_COUNT, IRQ_COUNT);
  135.        
  136.         /* hard clock */
  137.         i8254_init();
  138.                
  139. #ifdef CONFIG_FB
  140.         if (vesa_present())
  141.             vesa_init();
  142.         else
  143. #endif
  144.             ega_init(EGA_BASE, EGA_VIDEORAM);   /* video */
  145.        
  146.         /* Enable debugger */
  147.         debugger_init();
  148.         /* Merge all memory zones to 1 big zone */
  149.         zone_merge_all();
  150.     }
  151.    
  152.     /* Setup fast SYSCALL/SYSRET */
  153.     syscall_setup_cpu();
  154. }
  155.  
  156. void arch_post_cpu_init()
  157. {
  158. #ifdef CONFIG_SMP
  159.     if (config.cpu_active > 1) {
  160.         l_apic_init();
  161.         l_apic_debug();
  162.     }
  163. #endif
  164. }
  165.  
  166. void arch_pre_smp_init(void)
  167. {
  168.     if (config.cpu_active == 1) {
  169. #ifdef CONFIG_SMP
  170.         acpi_init();
  171. #endif /* CONFIG_SMP */
  172.     }
  173. }
  174.  
  175. void arch_post_smp_init(void)
  176. {
  177.     devno_t devno = device_assign_devno();
  178.     /* keyboard controller */
  179.     (void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
  180.  
  181.     /*
  182.      * This is the necessary evil until the userspace driver is entirely
  183.      * self-sufficient.
  184.      */
  185.     sysinfo_set_item_val("kbd", NULL, true);
  186.     sysinfo_set_item_val("kbd.devno", NULL, devno);
  187.     sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
  188. }
  189.  
  190. void calibrate_delay_loop(void)
  191. {
  192.     i8254_calibrate_delay_loop();
  193.     if (config.cpu_active == 1) {
  194.         /*
  195.          * This has to be done only on UP.
  196.          * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
  197.          */
  198.         i8254_normal_operation();
  199.     }
  200. }
  201.  
  202. /** Set thread-local-storage pointer
  203.  *
  204.  * TLS pointer is set in FS register. Unfortunately the 64-bit
  205.  * part can be set only in CPL0 mode.
  206.  *
  207.  * The specs say, that on %fs:0 there is stored contents of %fs register,
  208.  * we need not to go to CPL0 to read it.
  209.  */
  210. unative_t sys_tls_set(unative_t addr)
  211. {
  212.     THREAD->arch.tls = addr;
  213.     write_msr(AMD_MSR_FS, addr);
  214.     return 0;
  215. }
  216.  
  217. /** Acquire console back for kernel
  218.  *
  219.  */
  220. void arch_grab_console(void)
  221. {
  222. #ifdef CONFIG_FB
  223.     vesa_redraw();
  224. #else
  225.     ega_redraw();
  226. #endif
  227. }
  228.  
  229. /** Return console to userspace
  230.  *
  231.  */
  232. void arch_release_console(void)
  233. {
  234. }
  235.  
  236. /** Construct function pointer
  237.  *
  238.  * @param fptr   function pointer structure
  239.  * @param addr   function address
  240.  * @param caller calling function address
  241.  *
  242.  * @return address of the function pointer
  243.  *
  244.  */
  245. void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
  246. {
  247.     return addr;
  248. }
  249.  
  250. /** @}
  251.  */
  252.