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  1. /*
  2.  * Copyright (C) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch/mm/tlb.h>
  30. #include <mm/tlb.h>
  31. #include <genarch/mm/asid_fifo.h>
  32. #include <arch/mm/frame.h>
  33. #include <arch/mm/page.h>
  34. #include <arch/mm/mmu.h>
  35. #include <print.h>
  36. #include <arch/types.h>
  37. #include <typedefs.h>
  38. #include <config.h>
  39. #include <arch/trap/trap.h>
  40.  
  41. /** Initialize ITLB and DTLB.
  42.  *
  43.  * The goal of this function is to disable MMU
  44.  * so that both TLBs can be purged and new
  45.  * kernel 4M locked entry can be installed.
  46.  * After TLB is initialized, MMU is enabled
  47.  * again.
  48.  *
  49.  * Switching MMU off imposes the requirement for
  50.  * the kernel to run in identity mapped environment.
  51.  */
  52. void tlb_arch_init(void)
  53. {
  54.     tlb_tag_access_reg_t tag;
  55.     tlb_data_t data;
  56.     frame_address_t fr;
  57.     page_address_t pg;
  58.  
  59.     asid_fifo_init();
  60.  
  61.     fr.address = config.base;
  62.     pg.address = config.base;
  63.  
  64.     immu_disable();
  65.     dmmu_disable();
  66.    
  67.     /*
  68.      * For simplicity, we do identity mapping of first 4M of memory.
  69.      * The very next change should be leaving the first 4M unmapped.
  70.      */
  71.     tag.value = 0;
  72.     tag.vpn = pg.vpn;
  73.  
  74.     itlb_tag_access_write(tag.value);
  75.     dtlb_tag_access_write(tag.value);
  76.  
  77.     data.value = 0;
  78.     data.v = true;
  79.     data.size = PAGESIZE_4M;
  80.     data.pfn = fr.pfn;
  81.     data.l = true;
  82.     data.cp = 1;
  83.     data.cv = 1;
  84.     data.p = true;
  85.     data.w = true;
  86.     data.g = true;
  87.  
  88.     itlb_data_in_write(data.value);
  89.     dtlb_data_in_write(data.value);
  90.  
  91.     /*
  92.      * Register window traps can occur before MMU is enabled again.
  93.      * This ensures that any such traps will be handled from
  94.      * kernel identity mapped trap handler.
  95.      */
  96.     trap_switch_trap_table();
  97.    
  98.     tlb_invalidate_all();
  99.  
  100.     dmmu_enable();
  101.     immu_enable();
  102. }
  103.  
  104. /** Print contents of both TLBs. */
  105. void tlb_print(void)
  106. {
  107.     int i;
  108.     tlb_data_t d;
  109.     tlb_tag_read_reg_t t;
  110.    
  111.     printf("I-TLB contents:\n");
  112.     for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
  113.         d.value = itlb_data_access_read(i);
  114.         t.value = itlb_tag_read_read(i);
  115.        
  116.         printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
  117.             i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
  118.     }
  119.  
  120.     printf("D-TLB contents:\n");
  121.     for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
  122.         d.value = dtlb_data_access_read(i);
  123.         t.value = dtlb_tag_read_read(i);
  124.        
  125.         printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
  126.             i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
  127.     }
  128.  
  129. }
  130.  
  131. /** Invalidate all unlocked ITLB and DTLB entries. */
  132. void tlb_invalidate_all(void)
  133. {
  134.     int i;
  135.     tlb_data_t d;
  136.     tlb_tag_read_reg_t t;
  137.  
  138.     for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
  139.         d.value = itlb_data_access_read(i);
  140.         if (!d.l) {
  141.             t.value = itlb_tag_read_read(i);
  142.             d.v = false;
  143.             itlb_tag_access_write(t.value);
  144.             itlb_data_access_write(i, d.value);
  145.         }
  146.     }
  147.    
  148.     for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
  149.         d.value = dtlb_data_access_read(i);
  150.         if (!d.l) {
  151.             t.value = dtlb_tag_read_read(i);
  152.             d.v = false;
  153.             dtlb_tag_access_write(t.value);
  154.             dtlb_data_access_write(i, d.value);
  155.         }
  156.     }
  157.    
  158. }
  159.  
  160. /** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
  161.  *
  162.  * @param asid Address Space ID.
  163.  */
  164. void tlb_invalidate_asid(asid_t asid)
  165. {
  166.     /* TODO: write asid to some Context register and encode the register in second parameter below. */
  167.     itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
  168.     dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
  169. }
  170.  
  171. /** Invalidate all ITLB and DTLB entries for specified page range in specified address space.
  172.  *
  173.  * @param asid Address Space ID.
  174.  * @param page First page which to sweep out from ITLB and DTLB.
  175.  * @param cnt Number of ITLB and DTLB entries to invalidate.
  176.  */
  177. void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
  178. {
  179.     int i;
  180.    
  181.     for (i = 0; i < cnt; i++) {
  182.         /* TODO: write asid to some Context register and encode the register in second parameter below. */
  183.         itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
  184.         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
  185.     }
  186. }
  187.