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  1. /*
  2.  * Copyright (C) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29.  
  30. #include <arch.h>
  31. #include <arch/cp0.h>
  32. #include <arch/exception.h>
  33. #include <arch/asm.h>
  34. #include <mm/as.h>
  35.  
  36. #include <userspace.h>
  37. #include <arch/console.h>
  38. #include <memstr.h>
  39. #include <proc/thread.h>
  40. #include <proc/uarg.h>
  41. #include <print.h>
  42. #include <syscall/syscall.h>
  43.  
  44. #include <arch/interrupt.h>
  45. #include <arch/drivers/arc.h>
  46. #include <console/chardev.h>
  47. #include <arch/debugger.h>
  48. #include <genarch/fb/fb.h>
  49.  
  50. #include <arch/asm/regname.h>
  51.  
  52. /* Size of the code jumping to the exception handler code
  53.  * - J+NOP
  54.  */
  55. #define EXCEPTION_JUMP_SIZE    8
  56.  
  57. #define TLB_EXC ((char *) 0x80000000)
  58. #define NORM_EXC ((char *) 0x80000180)
  59. #define CACHE_EXC ((char *) 0x80000100)
  60.  
  61. void arch_pre_main(void)
  62. {
  63.     /* Setup usermode */
  64.     init.cnt = 5;
  65.     init.tasks[0].addr = INIT_ADDRESS;
  66.     init.tasks[0].size = INIT_SIZE;
  67.     init.tasks[1].addr = INIT_ADDRESS + 0x100000;
  68.     init.tasks[1].size = INIT_SIZE;
  69.     init.tasks[2].addr = INIT_ADDRESS + 0x200000;
  70.     init.tasks[2].size = INIT_SIZE;
  71.     init.tasks[3].addr = INIT_ADDRESS + 0x300000;
  72.     init.tasks[3].size = INIT_SIZE;
  73.     init.tasks[4].addr = INIT_ADDRESS + 0x400000;
  74.     init.tasks[4].size = INIT_SIZE;
  75.  
  76. }
  77.  
  78. void arch_pre_mm_init(void)
  79. {
  80.     /* It is not assumed by default */
  81.     interrupts_disable();
  82.    
  83.     /* Initialize dispatch table */
  84.     exception_init();
  85.     arc_init();
  86.  
  87.     /* Copy the exception vectors to the right places */
  88.     memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
  89.     memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
  90.     memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
  91.  
  92.     interrupt_init();
  93.     /*
  94.      * Switch to BEV normal level so that exception vectors point to the kernel.
  95.      * Clear the error level.
  96.      */
  97.     cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
  98.  
  99.     /*
  100.      * Mask all interrupts
  101.      */
  102.     cp0_mask_all_int();
  103.  
  104.     /*
  105.      * Unmask hardware clock interrupt.
  106.      */
  107.     cp0_unmask_int(TIMER_IRQ);
  108.  
  109.     console_init();
  110.     debugger_init();
  111. }
  112.  
  113. void arch_post_mm_init(void)
  114. {
  115. #ifdef CONFIG_FB
  116.         fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer
  117. #endif
  118. }
  119.  
  120. void arch_pre_smp_init(void)
  121. {
  122. }
  123.  
  124. void arch_post_smp_init(void)
  125. {
  126. }
  127.  
  128. /* Stack pointer saved when entering user mode */
  129. /* TODO: How do we do it on SMP system???? */
  130.  
  131. /* Why the linker moves the variable 64K away in assembler
  132.  * when not in .text section ????????
  133.  */
  134. __address supervisor_sp __attribute__ ((section (".text")));
  135.  
  136. void userspace(uspace_arg_t *kernel_uarg)
  137. {
  138.     /* EXL=1, UM=1, IE=1 */
  139.     cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
  140.                           cp0_status_um_bit |
  141.                           cp0_status_ie_enabled_bit));
  142.     cp0_epc_write((__address) kernel_uarg->uspace_entry);
  143.     userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
  144.               (__address) kernel_uarg->uspace_uarg,
  145.               (__address) kernel_uarg->uspace_entry);
  146.     while (1)
  147.         ;
  148. }
  149.  
  150. /** Perform mips32 specific tasks needed before the new task is run. */
  151. void before_task_runs_arch(void)
  152. {
  153. }
  154.  
  155. /** Perform mips32 specific tasks needed before the new thread is scheduled. */
  156. void before_thread_runs_arch(void)
  157. {
  158.     supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
  159. }
  160.  
  161. void after_thread_ran_arch(void)
  162. {
  163. }
  164.  
  165. /** Set thread-local-storage pointer
  166.  *
  167.  * We have it currently in K1, it is
  168.  * possible to have it separately in the future.
  169.  */
  170. __native sys_tls_set(__native addr)
  171. {
  172.     return 0;
  173. }
  174.  
  175.