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  1. /*
  2.  * Copyright (C) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #ifndef __mips32_PAGE_H__
  30. #define __mips32_PAGE_H__
  31.  
  32. #include <arch/mm/frame.h>
  33.  
  34. #define PAGE_WIDTH  FRAME_WIDTH
  35. #define PAGE_SIZE   FRAME_SIZE
  36.  
  37. #ifndef __ASM__
  38. #  define KA2PA(x)  (((__address) (x)) - 0x80000000)
  39. #  define PA2KA(x)  (((__address) (x)) + 0x80000000)
  40. #else
  41. #  define KA2PA(x)  ((x) - 0x80000000)
  42. #  define PA2KA(x)  ((x) + 0x80000000)
  43. #endif
  44.  
  45. #ifdef KERNEL
  46.  
  47. /*
  48.  * Implementation of generic 4-level page table interface.
  49.  * NOTE: this implementation is under construction
  50.  *
  51.  * Page table layout:
  52.  * - 32-bit virtual addresses
  53.  * - Offset is 14 bits => pages are 16K long
  54.  * - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long
  55.  * - PTE's replace EntryLo v (valid) bit with p (present) bit
  56.  * - PTE's use only one bit to distinguish between cacheable and uncacheable mappings
  57.  * - PTE's define soft_valid field to ensure there is at least one 1 bit even if the p bit is cleared
  58.  * - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) and bit A (accessed)
  59.  * - PTL0 has 64 entries (6 bits)
  60.  * - PTL1 is not used
  61.  * - PTL2 is not used
  62.  * - PTL3 has 4096 entries (12 bits)
  63.  */
  64.  
  65. #define PTL0_ENTRIES_ARCH   64
  66. #define PTL1_ENTRIES_ARCH   0
  67. #define PTL2_ENTRIES_ARCH   0
  68. #define PTL3_ENTRIES_ARCH   4096
  69.  
  70. #define PTL0_INDEX_ARCH(vaddr)  ((vaddr)>>26)
  71. #define PTL1_INDEX_ARCH(vaddr)  0
  72. #define PTL2_INDEX_ARCH(vaddr)  0
  73. #define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>14)&0x3fff)
  74.  
  75. #define SET_PTL0_ADDRESS_ARCH(ptl0)
  76.  
  77. #define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *)(ptl0))[(i)].pfn<<12)
  78. #define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
  79. #define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
  80. #define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *)(ptl3))[(i)].pfn<<12)
  81.  
  82. #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *)(ptl0))[(i)].pfn = (a)>>12)
  83. #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
  84. #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
  85. #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *)(ptl3))[(i)].pfn = (a)>>12)
  86.  
  87. #define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
  88. #define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
  89. #define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
  90. #define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
  91.  
  92. #define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
  93. #define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
  94. #define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
  95. #define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
  96.  
  97. #define PTE_VALID_ARCH(p)           (*((__u32 *) (p)) != 0)
  98.  
  99. #ifndef __ASM__
  100.  
  101. #include <arch/mm/tlb.h>
  102. #include <mm/page.h>
  103. #include <arch/mm/frame.h>
  104. #include <arch/types.h>
  105.  
  106. static inline int get_pt_flags(pte_t *pt, index_t i)
  107. {
  108.     pte_t *p = &pt[i];
  109.    
  110.     return (
  111.         (p->cacheable<<PAGE_CACHEABLE_SHIFT) |
  112.         ((!p->p)<<PAGE_PRESENT_SHIFT) |
  113.         (1<<PAGE_USER_SHIFT) |
  114.         (1<<PAGE_READ_SHIFT) |
  115.         ((p->w)<<PAGE_WRITE_SHIFT) |
  116.         (1<<PAGE_EXEC_SHIFT) |
  117.         (p->g<<PAGE_GLOBAL_SHIFT)
  118.     );
  119.        
  120. }
  121.  
  122. static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
  123. {
  124.     pte_t *p = &pt[i];
  125.    
  126.     p->cacheable = (flags & PAGE_CACHEABLE) != 0;
  127.     p->p = !(flags & PAGE_NOT_PRESENT);
  128.     p->g = (flags & PAGE_GLOBAL) != 0;
  129.     p->w = (flags & PAGE_WRITE) != 0;
  130.    
  131.     /*
  132.      * Ensure that valid entries have at least one bit set.
  133.      */
  134.     p->soft_valid = 1;
  135. }
  136.  
  137. extern void page_arch_init(void);
  138.  
  139. #endif /* __ASM__ */
  140.  
  141. #endif /* KERNEL */
  142.  
  143. #endif
  144.