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  1. /*
  2.  * Copyright (C) 2005 - 2006 Jakub Jermar
  3.  * Copyright (C) 2006 Jakub Vana
  4.  * All rights reserved.
  5.  *
  6.  * Redistribution and use in source and binary forms, with or without
  7.  * modification, are permitted provided that the following conditions
  8.  * are met:
  9.  *
  10.  * - Redistributions of source code must retain the above copyright
  11.  *   notice, this list of conditions and the following disclaimer.
  12.  * - Redistributions in binary form must reproduce the above copyright
  13.  *   notice, this list of conditions and the following disclaimer in the
  14.  *   documentation and/or other materials provided with the distribution.
  15.  * - The name of the author may not be used to endorse or promote products
  16.  *   derived from this software without specific prior written permission.
  17.  *
  18.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28.  */
  29.  
  30. #ifndef __ia64_PAGE_H__
  31. #define __ia64_PAGE_H__
  32.  
  33. #define PAGE_SIZE   FRAME_SIZE
  34. #define PAGE_WIDTH  FRAME_WIDTH
  35.  
  36. /** Bit width of the TLB-locked portion of kernel address space. */
  37. #define KERNEL_PAGE_WIDTH   28  /* 256M */
  38.  
  39. #define SET_PTL0_ADDRESS_ARCH(x)    /**< To be removed as situation permits. */
  40.  
  41. #define PPN_SHIFT           12
  42.  
  43. #define VRN_SHIFT           61
  44. #define VRN_MASK            (7LL << VRN_SHIFT)
  45. #define VA2VRN(va)          ((va)>>VRN_SHIFT)
  46.  
  47. #ifdef __ASM__
  48. #define VRN_KERNEL          7
  49. #else
  50. #define VRN_KERNEL          7LL
  51. #endif
  52.  
  53. #define REGION_REGISTERS        8
  54.  
  55. #define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
  56. #define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
  57.  
  58. #define VHPT_WIDTH          20          /* 1M */
  59. #define VHPT_SIZE           (1 << VHPT_WIDTH)
  60. #define VHPT_BASE           0       /* Must be aligned to VHPT_SIZE */
  61.  
  62. #define PTA_BASE_SHIFT          15
  63.  
  64. /** Memory Attributes. */
  65. #define MA_WRITEBACK    0x0
  66. #define MA_UNCACHEABLE  0x4
  67.  
  68. /** Privilege Levels. Only the most and the least privileged ones are ever used. */
  69. #define PL_KERNEL   0x0
  70. #define PL_USER     0x3
  71.  
  72. /* Access Rigths. Only certain combinations are used by the kernel. */
  73. #define AR_READ     0x0
  74. #define AR_EXECUTE  0x1
  75. #define AR_WRITE    0x2
  76.  
  77. #ifndef __ASM__
  78.  
  79. #include <arch/mm/frame.h>
  80. #include <arch/barrier.h>
  81. #include <genarch/mm/page_ht.h>
  82. #include <arch/mm/asid.h>
  83. #include <arch/types.h>
  84. #include <typedefs.h>
  85. #include <debug.h>
  86.  
  87. struct vhpt_tag_info {
  88.     unsigned long long tag : 63;
  89.     unsigned ti : 1;
  90. } __attribute__ ((packed));
  91.  
  92. union vhpt_tag {
  93.     struct vhpt_tag_info tag_info;
  94.     unsigned tag_word;
  95. };
  96.  
  97. struct vhpt_entry_present {
  98.     /* Word 0 */
  99.     unsigned p : 1;
  100.     unsigned : 1;
  101.     unsigned ma : 3;
  102.     unsigned a : 1;
  103.     unsigned d : 1;
  104.     unsigned pl : 2;
  105.     unsigned ar : 3;
  106.     unsigned long long ppn : 38;
  107.     unsigned : 2;
  108.     unsigned ed : 1;
  109.     unsigned ig1 : 11;
  110.    
  111.     /* Word 1 */
  112.     unsigned : 2;
  113.     unsigned ps : 6;
  114.     unsigned key : 24;
  115.     unsigned : 32;
  116.    
  117.     /* Word 2 */
  118.     union vhpt_tag tag;
  119.    
  120.     /* Word 3 */                                                   
  121.     __u64 ig3 : 64;
  122. } __attribute__ ((packed));
  123.  
  124. struct vhpt_entry_not_present {
  125.     /* Word 0 */
  126.     unsigned p : 1;
  127.     unsigned long long ig0 : 52;
  128.     unsigned ig1 : 11;
  129.    
  130.     /* Word 1 */
  131.     unsigned : 2;
  132.     unsigned ps : 6;
  133.     unsigned long long ig2 : 56;
  134.  
  135.     /* Word 2 */
  136.     union vhpt_tag tag;
  137.    
  138.     /* Word 3 */                                                   
  139.     __u64 ig3 : 64;
  140. } __attribute__ ((packed));
  141.  
  142. typedef union vhpt_entry {
  143.     struct vhpt_entry_present present;
  144.     struct vhpt_entry_not_present not_present;
  145.     __u64 word[4];
  146. } vhpt_entry_t;
  147.  
  148. struct region_register_map {
  149.     unsigned ve : 1;
  150.     unsigned : 1;
  151.     unsigned ps : 6;
  152.     unsigned rid : 24;
  153.     unsigned : 32;
  154. } __attribute__ ((packed));
  155.  
  156. typedef union region_register {
  157.     struct region_register_map map;
  158.     unsigned long long word;
  159. } region_register;
  160.  
  161. struct pta_register_map {
  162.     unsigned ve : 1;
  163.     unsigned : 1;
  164.     unsigned size : 6;
  165.     unsigned vf : 1;
  166.     unsigned : 6;
  167.     unsigned long long base : 49;
  168. } __attribute__ ((packed));
  169.  
  170. typedef union pta_register {
  171.     struct pta_register_map map;
  172.     __u64 word;
  173. } pta_register;
  174.  
  175. /** Return Translation Hashed Entry Address.
  176.  *
  177.  * VRN bits are used to read RID (ASID) from one
  178.  * of the eight region registers registers.
  179.  *
  180.  * @param va Virtual address including VRN bits.
  181.  *
  182.  * @return Address of the head of VHPT collision chain.
  183.  */
  184. static inline __u64 thash(__u64 va)
  185. {
  186.     __u64 ret;
  187.  
  188.     __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
  189.  
  190.     return ret;
  191. }
  192.  
  193. /** Return Translation Hashed Entry Tag.
  194.  *
  195.  * VRN bits are used to read RID (ASID) from one
  196.  * of the eight region registers.
  197.  *
  198.  * @param va Virtual address including VRN bits.
  199.  *
  200.  * @return The unique tag for VPN and RID in the collision chain returned by thash().
  201.  */
  202. static inline __u64 ttag(__u64 va)
  203. {
  204.     __u64 ret;
  205.  
  206.     __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
  207.  
  208.     return ret;
  209. }
  210.  
  211. /** Read Region Register.
  212.  *
  213.  * @param i Region register index.
  214.  *
  215.  * @return Current contents of rr[i].
  216.  */
  217. static inline __u64 rr_read(index_t i)
  218. {
  219.     __u64 ret;
  220.     ASSERT(i < REGION_REGISTERS);
  221.     __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
  222.     return ret;
  223. }
  224.  
  225. /** Write Region Register.
  226.  *
  227.  * @param i Region register index.
  228.  * @param v Value to be written to rr[i].
  229.  */
  230. static inline void rr_write(index_t i, __u64 v)
  231. {
  232.     ASSERT(i < REGION_REGISTERS);
  233.     __asm__ volatile (
  234.         "mov rr[%0] = %1\n"
  235.         :
  236.         : "r" (i << VRN_SHIFT), "r" (v)
  237.     );
  238. }
  239.  
  240. /** Read Page Table Register.
  241.  *
  242.  * @return Current value stored in PTA.
  243.  */
  244. static inline __u64 pta_read(void)
  245. {
  246.     __u64 ret;
  247.    
  248.     __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
  249.    
  250.     return ret;
  251. }
  252.  
  253. /** Write Page Table Register.
  254.  *
  255.  * @param v New value to be stored in PTA.
  256.  */
  257. static inline void pta_write(__u64 v)
  258. {
  259.     __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
  260. }
  261.  
  262. extern void page_arch_init(void);
  263.  
  264. extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
  265. extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
  266. extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
  267.  
  268. #endif
  269.  
  270. #endif
  271.