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  1. /*
  2.  * Copyright (C) 2005 - 2006 Jakub Jermar
  3.  * Copyright (C) 2006 Jakub Vana
  4.  * All rights reserved.
  5.  *
  6.  * Redistribution and use in source and binary forms, with or without
  7.  * modification, are permitted provided that the following conditions
  8.  * are met:
  9.  *
  10.  * - Redistributions of source code must retain the above copyright
  11.  *   notice, this list of conditions and the following disclaimer.
  12.  * - Redistributions in binary form must reproduce the above copyright
  13.  *   notice, this list of conditions and the following disclaimer in the
  14.  *   documentation and/or other materials provided with the distribution.
  15.  * - The name of the author may not be used to endorse or promote products
  16.  *   derived from this software without specific prior written permission.
  17.  *
  18.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28.  */
  29.  
  30. #ifndef __ia64_PAGE_H__
  31. #define __ia64_PAGE_H__
  32.  
  33. #include <arch/mm/frame.h>
  34.  
  35. #define PAGE_SIZE   FRAME_SIZE
  36. #define PAGE_WIDTH  FRAME_WIDTH
  37.  
  38.  
  39. #ifdef KERNEL
  40.  
  41. /** Bit width of the TLB-locked portion of kernel address space. */
  42. #define KERNEL_PAGE_WIDTH   28  /* 256M */
  43.  
  44. #define PPN_SHIFT           12
  45.  
  46. #define VRN_SHIFT           61
  47. #define VRN_MASK            (7LL << VRN_SHIFT)
  48. #define VA2VRN(va)          ((va)>>VRN_SHIFT)
  49.  
  50. #ifdef __ASM__
  51. #define VRN_KERNEL          7
  52. #else
  53. #define VRN_KERNEL          7LL
  54. #endif
  55.  
  56. #define REGION_REGISTERS        8
  57.  
  58. #define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
  59. #define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
  60.  
  61. #define VHPT_WIDTH          20          /* 1M */
  62. #define VHPT_SIZE           (1 << VHPT_WIDTH)
  63. #define VHPT_BASE           0       /* Must be aligned to VHPT_SIZE */
  64.  
  65. #define PTA_BASE_SHIFT          15
  66.  
  67. /** Memory Attributes. */
  68. #define MA_WRITEBACK    0x0
  69. #define MA_UNCACHEABLE  0x4
  70.  
  71. /** Privilege Levels. Only the most and the least privileged ones are ever used. */
  72. #define PL_KERNEL   0x0
  73. #define PL_USER     0x3
  74.  
  75. /* Access Rigths. Only certain combinations are used by the kernel. */
  76. #define AR_READ     0x0
  77. #define AR_EXECUTE  0x1
  78. #define AR_WRITE    0x2
  79.  
  80. #ifndef __ASM__
  81.  
  82. #include <arch/mm/frame.h>
  83. #include <arch/barrier.h>
  84. #include <genarch/mm/page_ht.h>
  85. #include <arch/mm/asid.h>
  86. #include <arch/types.h>
  87. #include <typedefs.h>
  88. #include <debug.h>
  89.  
  90. struct vhpt_tag_info {
  91.     unsigned long long tag : 63;
  92.     unsigned ti : 1;
  93. } __attribute__ ((packed));
  94.  
  95. union vhpt_tag {
  96.     struct vhpt_tag_info tag_info;
  97.     unsigned tag_word;
  98. };
  99.  
  100. struct vhpt_entry_present {
  101.     /* Word 0 */
  102.     unsigned p : 1;
  103.     unsigned : 1;
  104.     unsigned ma : 3;
  105.     unsigned a : 1;
  106.     unsigned d : 1;
  107.     unsigned pl : 2;
  108.     unsigned ar : 3;
  109.     unsigned long long ppn : 38;
  110.     unsigned : 2;
  111.     unsigned ed : 1;
  112.     unsigned ig1 : 11;
  113.    
  114.     /* Word 1 */
  115.     unsigned : 2;
  116.     unsigned ps : 6;
  117.     unsigned key : 24;
  118.     unsigned : 32;
  119.    
  120.     /* Word 2 */
  121.     union vhpt_tag tag;
  122.    
  123.     /* Word 3 */                                                   
  124.     __u64 ig3 : 64;
  125. } __attribute__ ((packed));
  126.  
  127. struct vhpt_entry_not_present {
  128.     /* Word 0 */
  129.     unsigned p : 1;
  130.     unsigned long long ig0 : 52;
  131.     unsigned ig1 : 11;
  132.    
  133.     /* Word 1 */
  134.     unsigned : 2;
  135.     unsigned ps : 6;
  136.     unsigned long long ig2 : 56;
  137.  
  138.     /* Word 2 */
  139.     union vhpt_tag tag;
  140.    
  141.     /* Word 3 */                                                   
  142.     __u64 ig3 : 64;
  143. } __attribute__ ((packed));
  144.  
  145. typedef union vhpt_entry {
  146.     struct vhpt_entry_present present;
  147.     struct vhpt_entry_not_present not_present;
  148.     __u64 word[4];
  149. } vhpt_entry_t;
  150.  
  151. struct region_register_map {
  152.     unsigned ve : 1;
  153.     unsigned : 1;
  154.     unsigned ps : 6;
  155.     unsigned rid : 24;
  156.     unsigned : 32;
  157. } __attribute__ ((packed));
  158.  
  159. typedef union region_register {
  160.     struct region_register_map map;
  161.     unsigned long long word;
  162. } region_register;
  163.  
  164. struct pta_register_map {
  165.     unsigned ve : 1;
  166.     unsigned : 1;
  167.     unsigned size : 6;
  168.     unsigned vf : 1;
  169.     unsigned : 6;
  170.     unsigned long long base : 49;
  171. } __attribute__ ((packed));
  172.  
  173. typedef union pta_register {
  174.     struct pta_register_map map;
  175.     __u64 word;
  176. } pta_register;
  177.  
  178. /** Return Translation Hashed Entry Address.
  179.  *
  180.  * VRN bits are used to read RID (ASID) from one
  181.  * of the eight region registers registers.
  182.  *
  183.  * @param va Virtual address including VRN bits.
  184.  *
  185.  * @return Address of the head of VHPT collision chain.
  186.  */
  187. static inline __u64 thash(__u64 va)
  188. {
  189.     __u64 ret;
  190.  
  191.     __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
  192.  
  193.     return ret;
  194. }
  195.  
  196. /** Return Translation Hashed Entry Tag.
  197.  *
  198.  * VRN bits are used to read RID (ASID) from one
  199.  * of the eight region registers.
  200.  *
  201.  * @param va Virtual address including VRN bits.
  202.  *
  203.  * @return The unique tag for VPN and RID in the collision chain returned by thash().
  204.  */
  205. static inline __u64 ttag(__u64 va)
  206. {
  207.     __u64 ret;
  208.  
  209.     __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
  210.  
  211.     return ret;
  212. }
  213.  
  214. /** Read Region Register.
  215.  *
  216.  * @param i Region register index.
  217.  *
  218.  * @return Current contents of rr[i].
  219.  */
  220. static inline __u64 rr_read(index_t i)
  221. {
  222.     __u64 ret;
  223.     ASSERT(i < REGION_REGISTERS);
  224.     __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
  225.     return ret;
  226. }
  227.  
  228. /** Write Region Register.
  229.  *
  230.  * @param i Region register index.
  231.  * @param v Value to be written to rr[i].
  232.  */
  233. static inline void rr_write(index_t i, __u64 v)
  234. {
  235.     ASSERT(i < REGION_REGISTERS);
  236.     __asm__ volatile (
  237.         "mov rr[%0] = %1\n"
  238.         :
  239.         : "r" (i << VRN_SHIFT), "r" (v)
  240.     );
  241. }
  242.  
  243. /** Read Page Table Register.
  244.  *
  245.  * @return Current value stored in PTA.
  246.  */
  247. static inline __u64 pta_read(void)
  248. {
  249.     __u64 ret;
  250.    
  251.     __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
  252.    
  253.     return ret;
  254. }
  255.  
  256. /** Write Page Table Register.
  257.  *
  258.  * @param v New value to be stored in PTA.
  259.  */
  260. static inline void pta_write(__u64 v)
  261. {
  262.     __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
  263. }
  264.  
  265. extern void page_arch_init(void);
  266.  
  267. extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
  268. extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
  269. extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
  270.  
  271. #endif /* __ASM__ */
  272.  
  273. #endif /* KERNEL */
  274.  
  275. #endif
  276.