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  1. /*
  2.  * Copyright (C) 2005 - 2006 Jakub Jermar
  3.  * Copyright (C) 2006 Jakub Vana
  4.  * All rights reserved.
  5.  *
  6.  * Redistribution and use in source and binary forms, with or without
  7.  * modification, are permitted provided that the following conditions
  8.  * are met:
  9.  *
  10.  * - Redistributions of source code must retain the above copyright
  11.  *   notice, this list of conditions and the following disclaimer.
  12.  * - Redistributions in binary form must reproduce the above copyright
  13.  *   notice, this list of conditions and the following disclaimer in the
  14.  *   documentation and/or other materials provided with the distribution.
  15.  * - The name of the author may not be used to endorse or promote products
  16.  *   derived from this software without specific prior written permission.
  17.  *
  18.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28.  */
  29.  
  30. #ifndef __ia64_PAGE_H__
  31. #define __ia64_PAGE_H__
  32.  
  33. #include <arch/mm/frame.h>
  34.  
  35. #define PAGE_SIZE   FRAME_SIZE
  36. #define PAGE_WIDTH  FRAME_WIDTH
  37.  
  38.  
  39. #ifdef KERNEL
  40.  
  41. /** Bit width of the TLB-locked portion of kernel address space. */
  42. #define KERNEL_PAGE_WIDTH   28  /* 256M */
  43.  
  44. #define SET_PTL0_ADDRESS_ARCH(x)    /**< To be removed as situation permits. */
  45.  
  46. #define PPN_SHIFT           12
  47.  
  48. #define VRN_SHIFT           61
  49. #define VRN_MASK            (7LL << VRN_SHIFT)
  50. #define VA2VRN(va)          ((va)>>VRN_SHIFT)
  51.  
  52. #ifdef __ASM__
  53. #define VRN_KERNEL          7
  54. #else
  55. #define VRN_KERNEL          7LL
  56. #endif
  57.  
  58. #define REGION_REGISTERS        8
  59.  
  60. #define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
  61. #define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
  62.  
  63. #define VHPT_WIDTH          20          /* 1M */
  64. #define VHPT_SIZE           (1 << VHPT_WIDTH)
  65. #define VHPT_BASE           0       /* Must be aligned to VHPT_SIZE */
  66.  
  67. #define PTA_BASE_SHIFT          15
  68.  
  69. /** Memory Attributes. */
  70. #define MA_WRITEBACK    0x0
  71. #define MA_UNCACHEABLE  0x4
  72.  
  73. /** Privilege Levels. Only the most and the least privileged ones are ever used. */
  74. #define PL_KERNEL   0x0
  75. #define PL_USER     0x3
  76.  
  77. /* Access Rigths. Only certain combinations are used by the kernel. */
  78. #define AR_READ     0x0
  79. #define AR_EXECUTE  0x1
  80. #define AR_WRITE    0x2
  81.  
  82. #ifndef __ASM__
  83.  
  84. #include <arch/mm/frame.h>
  85. #include <arch/barrier.h>
  86. #include <genarch/mm/page_ht.h>
  87. #include <arch/mm/asid.h>
  88. #include <arch/types.h>
  89. #include <typedefs.h>
  90. #include <debug.h>
  91.  
  92. struct vhpt_tag_info {
  93.     unsigned long long tag : 63;
  94.     unsigned ti : 1;
  95. } __attribute__ ((packed));
  96.  
  97. union vhpt_tag {
  98.     struct vhpt_tag_info tag_info;
  99.     unsigned tag_word;
  100. };
  101.  
  102. struct vhpt_entry_present {
  103.     /* Word 0 */
  104.     unsigned p : 1;
  105.     unsigned : 1;
  106.     unsigned ma : 3;
  107.     unsigned a : 1;
  108.     unsigned d : 1;
  109.     unsigned pl : 2;
  110.     unsigned ar : 3;
  111.     unsigned long long ppn : 38;
  112.     unsigned : 2;
  113.     unsigned ed : 1;
  114.     unsigned ig1 : 11;
  115.    
  116.     /* Word 1 */
  117.     unsigned : 2;
  118.     unsigned ps : 6;
  119.     unsigned key : 24;
  120.     unsigned : 32;
  121.    
  122.     /* Word 2 */
  123.     union vhpt_tag tag;
  124.    
  125.     /* Word 3 */                                                   
  126.     __u64 ig3 : 64;
  127. } __attribute__ ((packed));
  128.  
  129. struct vhpt_entry_not_present {
  130.     /* Word 0 */
  131.     unsigned p : 1;
  132.     unsigned long long ig0 : 52;
  133.     unsigned ig1 : 11;
  134.    
  135.     /* Word 1 */
  136.     unsigned : 2;
  137.     unsigned ps : 6;
  138.     unsigned long long ig2 : 56;
  139.  
  140.     /* Word 2 */
  141.     union vhpt_tag tag;
  142.    
  143.     /* Word 3 */                                                   
  144.     __u64 ig3 : 64;
  145. } __attribute__ ((packed));
  146.  
  147. typedef union vhpt_entry {
  148.     struct vhpt_entry_present present;
  149.     struct vhpt_entry_not_present not_present;
  150.     __u64 word[4];
  151. } vhpt_entry_t;
  152.  
  153. struct region_register_map {
  154.     unsigned ve : 1;
  155.     unsigned : 1;
  156.     unsigned ps : 6;
  157.     unsigned rid : 24;
  158.     unsigned : 32;
  159. } __attribute__ ((packed));
  160.  
  161. typedef union region_register {
  162.     struct region_register_map map;
  163.     unsigned long long word;
  164. } region_register;
  165.  
  166. struct pta_register_map {
  167.     unsigned ve : 1;
  168.     unsigned : 1;
  169.     unsigned size : 6;
  170.     unsigned vf : 1;
  171.     unsigned : 6;
  172.     unsigned long long base : 49;
  173. } __attribute__ ((packed));
  174.  
  175. typedef union pta_register {
  176.     struct pta_register_map map;
  177.     __u64 word;
  178. } pta_register;
  179.  
  180. /** Return Translation Hashed Entry Address.
  181.  *
  182.  * VRN bits are used to read RID (ASID) from one
  183.  * of the eight region registers registers.
  184.  *
  185.  * @param va Virtual address including VRN bits.
  186.  *
  187.  * @return Address of the head of VHPT collision chain.
  188.  */
  189. static inline __u64 thash(__u64 va)
  190. {
  191.     __u64 ret;
  192.  
  193.     __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
  194.  
  195.     return ret;
  196. }
  197.  
  198. /** Return Translation Hashed Entry Tag.
  199.  *
  200.  * VRN bits are used to read RID (ASID) from one
  201.  * of the eight region registers.
  202.  *
  203.  * @param va Virtual address including VRN bits.
  204.  *
  205.  * @return The unique tag for VPN and RID in the collision chain returned by thash().
  206.  */
  207. static inline __u64 ttag(__u64 va)
  208. {
  209.     __u64 ret;
  210.  
  211.     __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
  212.  
  213.     return ret;
  214. }
  215.  
  216. /** Read Region Register.
  217.  *
  218.  * @param i Region register index.
  219.  *
  220.  * @return Current contents of rr[i].
  221.  */
  222. static inline __u64 rr_read(index_t i)
  223. {
  224.     __u64 ret;
  225.     ASSERT(i < REGION_REGISTERS);
  226.     __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
  227.     return ret;
  228. }
  229.  
  230. /** Write Region Register.
  231.  *
  232.  * @param i Region register index.
  233.  * @param v Value to be written to rr[i].
  234.  */
  235. static inline void rr_write(index_t i, __u64 v)
  236. {
  237.     ASSERT(i < REGION_REGISTERS);
  238.     __asm__ volatile (
  239.         "mov rr[%0] = %1\n"
  240.         :
  241.         : "r" (i << VRN_SHIFT), "r" (v)
  242.     );
  243. }
  244.  
  245. /** Read Page Table Register.
  246.  *
  247.  * @return Current value stored in PTA.
  248.  */
  249. static inline __u64 pta_read(void)
  250. {
  251.     __u64 ret;
  252.    
  253.     __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
  254.    
  255.     return ret;
  256. }
  257.  
  258. /** Write Page Table Register.
  259.  *
  260.  * @param v New value to be stored in PTA.
  261.  */
  262. static inline void pta_write(__u64 v)
  263. {
  264.     __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
  265. }
  266.  
  267. extern void page_arch_init(void);
  268.  
  269. extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
  270. extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
  271. extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
  272.  
  273. #endif /* __ASM__ */
  274.  
  275. #endif /* KERNEL */
  276.  
  277. #endif
  278.