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  1. /*
  2.  * Copyright (C) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29.  /** @addtogroup mips32
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35.  
  36. #include <arch.h>
  37. #include <arch/boot.h>
  38. #include <arch/cp0.h>
  39. #include <arch/exception.h>
  40. #include <arch/asm.h>
  41. #include <mm/as.h>
  42.  
  43. #include <userspace.h>
  44. #include <arch/console.h>
  45. #include <memstr.h>
  46. #include <proc/thread.h>
  47. #include <proc/uarg.h>
  48. #include <print.h>
  49. #include <syscall/syscall.h>
  50. #include <sysinfo/sysinfo.h>
  51.  
  52. #include <arch/interrupt.h>
  53. #include <arch/drivers/arc.h>
  54. #include <console/chardev.h>
  55. #include <arch/debugger.h>
  56. #include <genarch/fb/fb.h>
  57. #include <debug.h>
  58.  
  59. #include <arch/asm/regname.h>
  60.  
  61. /* Size of the code jumping to the exception handler code
  62.  * - J+NOP
  63.  */
  64. #define EXCEPTION_JUMP_SIZE    8
  65.  
  66. #define TLB_EXC ((char *) 0x80000000)
  67. #define NORM_EXC ((char *) 0x80000180)
  68. #define CACHE_EXC ((char *) 0x80000100)
  69.  
  70.  
  71. /* Why the linker moves the variable 64K away in assembler
  72.  * when not in .text section ????????
  73.  */
  74. __address supervisor_sp __attribute__ ((section (".text")));
  75. /* Stack pointer saved when entering user mode */
  76. /* TODO: How do we do it on SMP system???? */
  77. bootinfo_t bootinfo __attribute__ ((section (".text")));
  78.  
  79. void arch_pre_main(void)
  80. {
  81.     /* Setup usermode */
  82.     init.cnt = bootinfo.cnt;
  83.    
  84.     __u32 i;
  85.    
  86.     for (i = 0; i < bootinfo.cnt; i++) {
  87.         init.tasks[i].addr = bootinfo.tasks[i].addr;
  88.         init.tasks[i].size = bootinfo.tasks[i].size;
  89.     }
  90. }
  91.  
  92. void arch_pre_mm_init(void)
  93. {
  94.     /* It is not assumed by default */
  95.     interrupts_disable();
  96.    
  97.     /* Initialize dispatch table */
  98.     exception_init();
  99.     arc_init();
  100.  
  101.     /* Copy the exception vectors to the right places */
  102.     memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
  103.     memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
  104.     memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
  105.  
  106.     interrupt_init();
  107.     /*
  108.      * Switch to BEV normal level so that exception vectors point to the kernel.
  109.      * Clear the error level.
  110.      */
  111.     cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
  112.  
  113.     /*
  114.      * Mask all interrupts
  115.      */
  116.     cp0_mask_all_int();
  117.  
  118.     /*
  119.      * Unmask hardware clock interrupt.
  120.      */
  121.     cp0_unmask_int(TIMER_IRQ);
  122.  
  123.     console_init();
  124.     debugger_init();
  125. }
  126.  
  127. void arch_post_mm_init(void)
  128. {
  129. #ifdef CONFIG_FB
  130.     fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer
  131. #endif
  132.     sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1);
  133. }
  134.  
  135. void arch_pre_smp_init(void)
  136. {
  137. }
  138.  
  139. void arch_post_smp_init(void)
  140. {
  141. }
  142.  
  143. void userspace(uspace_arg_t *kernel_uarg)
  144. {
  145.     /* EXL=1, UM=1, IE=1 */
  146.     cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
  147.                           cp0_status_um_bit |
  148.                           cp0_status_ie_enabled_bit));
  149.     cp0_epc_write((__address) kernel_uarg->uspace_entry);
  150.     userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
  151.               (__address) kernel_uarg->uspace_uarg,
  152.               (__address) kernel_uarg->uspace_entry);
  153.     while (1)
  154.         ;
  155. }
  156.  
  157. /** Perform mips32 specific tasks needed before the new task is run. */
  158. void before_task_runs_arch(void)
  159. {
  160. }
  161.  
  162. /** Perform mips32 specific tasks needed before the new thread is scheduled. */
  163. void before_thread_runs_arch(void)
  164. {
  165.     supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
  166. }
  167.  
  168. void after_thread_ran_arch(void)
  169. {
  170. }
  171.  
  172. /** Set thread-local-storage pointer
  173.  *
  174.  * We have it currently in K1, it is
  175.  * possible to have it separately in the future.
  176.  */
  177. __native sys_tls_set(__native addr)
  178. {
  179.     return 0;
  180. }
  181.  
  182.  
  183.  /** @}
  184.  */
  185.  
  186.