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  1. /*
  2.  * Copyright (C) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29.  
  30. #include <arch.h>
  31. #include <arch/cp0.h>
  32. #include <arch/exception.h>
  33. #include <arch/asm.h>
  34. #include <mm/as.h>
  35.  
  36. #include <userspace.h>
  37. #include <arch/console.h>
  38. #include <memstr.h>
  39. #include <proc/thread.h>
  40. #include <proc/uarg.h>
  41. #include <print.h>
  42. #include <syscall/syscall.h>
  43.  
  44. #include <arch/interrupt.h>
  45. #include <arch/drivers/arc.h>
  46. #include <console/chardev.h>
  47. #include <arch/debugger.h>
  48.  
  49. #include <arch/asm/regname.h>
  50.  
  51. /* Size of the code jumping to the exception handler code
  52.  * - J+NOP
  53.  */
  54. #define EXCEPTION_JUMP_SIZE    8
  55.  
  56. #define TLB_EXC ((char *) 0x80000000)
  57. #define NORM_EXC ((char *) 0x80000180)
  58. #define CACHE_EXC ((char *) 0x80000100)
  59.  
  60. void arch_pre_main(void)
  61. {
  62.     /* Setup usermode */
  63.     init.cnt = 1;
  64.     init.tasks[0].addr = INIT_ADDRESS;
  65.     init.tasks[0].size = INIT_SIZE;
  66. }
  67.  
  68. void arch_pre_mm_init(void)
  69. {
  70.     /* It is not assumed by default */
  71.     interrupts_disable();
  72.    
  73.     /* Initialize dispatch table */
  74.     exception_init();
  75.     interrupt_init();
  76.  
  77.     arc_init();
  78.  
  79.     /* Copy the exception vectors to the right places */
  80.     memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
  81.     memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
  82.     memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
  83.  
  84.     /*
  85.      * Switch to BEV normal level so that exception vectors point to the kernel.
  86.      * Clear the error level.
  87.      */
  88.     cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
  89.  
  90.     /*
  91.      * Mask all interrupts
  92.      */
  93.     cp0_mask_all_int();
  94.     /*
  95.      * Unmask hardware clock interrupt.
  96.      */
  97.     cp0_unmask_int(TIMER_IRQ);
  98.  
  99.     /*
  100.      * Start hardware clock.
  101.      */
  102.     cp0_compare_write(cp0_compare_value + cp0_count_read());
  103.  
  104.     console_init();
  105.     debugger_init();
  106. }
  107.  
  108. void arch_post_mm_init(void)
  109. {
  110. }
  111.  
  112. void arch_pre_smp_init(void)
  113. {
  114. }
  115.  
  116. void arch_post_smp_init(void)
  117. {
  118. }
  119.  
  120. /* Stack pointer saved when entering user mode */
  121. /* TODO: How do we do it on SMP system???? */
  122.  
  123. /* Why the linker moves the variable 64K away in assembler
  124.  * when not in .text section ????????
  125.  */
  126. __address supervisor_sp __attribute__ ((section (".text")));
  127.  
  128. void userspace(uspace_arg_t *kernel_uarg)
  129. {
  130.     /* EXL=1, UM=1, IE=1 */
  131.     cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
  132.                           cp0_status_um_bit |
  133.                           cp0_status_ie_enabled_bit));
  134.     cp0_epc_write((__address) kernel_uarg->uspace_entry);
  135.     userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
  136.               (__address) kernel_uarg->uspace_uarg,
  137.               (__address) kernel_uarg->uspace_entry);
  138.     while (1)
  139.         ;
  140. }
  141.  
  142. /** Perform mips32 specific tasks needed before the new task is run. */
  143. void before_task_runs_arch(void)
  144. {
  145. }
  146.  
  147. /** Perform mips32 specific tasks needed before the new thread is scheduled. */
  148. void before_thread_runs_arch(void)
  149. {
  150.     supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
  151. }
  152.  
  153. void after_thread_ran_arch(void)
  154. {
  155. }
  156.  
  157. /** Set thread-local-storage pointer
  158.  *
  159.  * We have it currently in K1, it is
  160.  * possible to have it separately in the future.
  161.  */
  162. __native sys_tls_set(__native addr)
  163. {
  164.     return 0;
  165. }
  166.