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  1. /*
  2.  * Copyright (c) 2005 Jakub Vana
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ia32   
  30.  * @{
  31.  */
  32. /** @file
  33.  *
  34.  */
  35.  
  36. #include <fpu_context.h>
  37. #include <arch.h>
  38. #include <cpu.h>
  39.  
  40. typedef void (*fpu_context_function)(fpu_context_t *fctx);
  41.  
  42. static fpu_context_function fpu_save, fpu_restore;
  43.  
  44. static void fpu_context_f_save(fpu_context_t *fctx)
  45. {
  46.     asm volatile (
  47.         "fnsave %0"
  48.         : "=m"(*fctx)
  49.         );
  50. }
  51.  
  52. static void fpu_context_f_restore(fpu_context_t *fctx)
  53. {
  54.     asm volatile (
  55.         "frstor %0"
  56.         : "=m"(*fctx)
  57.         );
  58. }
  59.  
  60. static void fpu_context_fx_save(fpu_context_t *fctx)
  61. {
  62.     asm volatile (
  63.         "fxsave %0"
  64.         : "=m"(*fctx)
  65.         );
  66. }
  67.  
  68. static void fpu_context_fx_restore(fpu_context_t *fctx)
  69. {
  70.     asm volatile (
  71.         "fxrstor %0"
  72.         : "=m"(*fctx)
  73.         );
  74. }
  75.  
  76. /*
  77.     Setup using fxsr instruction
  78. */
  79. void fpu_fxsr(void)
  80. {
  81.     fpu_save=fpu_context_fx_save;
  82.     fpu_restore=fpu_context_fx_restore;
  83. }
  84. /*
  85.     Setup using not fxsr instruction
  86. */
  87. void fpu_fsr(void)
  88. {
  89.     fpu_save = fpu_context_f_save;
  90.     fpu_restore = fpu_context_f_restore;
  91. }
  92.  
  93. void fpu_context_save(fpu_context_t *fctx)
  94. {
  95.     fpu_save(fctx);
  96. }
  97.  
  98. void fpu_context_restore(fpu_context_t *fctx)
  99. {
  100.     fpu_restore(fctx);
  101. }
  102.  
  103. void fpu_init()
  104. {
  105.     uint32_t help0 = 0, help1 = 0;
  106.     asm volatile (
  107.         "fninit;\n"
  108.         "stmxcsr %0\n"
  109.         "mov %0,%1;\n"
  110.         "or %2,%1;\n"
  111.         "mov %1,%0;\n"
  112.         "ldmxcsr %0;\n"
  113.         : "+m" (help0), "+r" (help1)
  114.         : "i" (0x1f80)
  115.     );
  116. }
  117.  
  118. /** @}
  119.  */
  120.