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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch/cpu.h>
  30. #include <cpu.h>
  31.  
  32. #include <arch.h>
  33.  
  34. #include <arch/cp0.h>
  35.  
  36. #include <typedefs.h>
  37. #include <print.h>
  38.  
  39. struct {
  40.     char *vendor;
  41.     char *model;
  42. } imp_data[] = {
  43.     { "Invalid", "Invalid" },   /* 0x00 */
  44.     { "MIPS", "R2000" },        /* 0x01 */
  45.     { "MIPS", "R3000" },        /* 0x02 */
  46.     { "MIPS", "R6000" },        /* 0x03 */
  47.     { "MIPS", " R4000/R4400" },     /* 0x04 */
  48.     { "LSI Logic", "R3000" },   /* 0x05 */
  49.     { "MIPS", "R6000A" },       /* 0x06 */
  50.     { "IDT", "3051/3052" },     /* 0x07 */
  51.     { "Invalid", "Invalid" },   /* 0x08 */
  52.     { "MIPS", "R10000/T5" },    /* 0x09 */
  53.     { "MIPS", "R4200" },        /* 0x0a */
  54.     { "Unknown", "Unknown" },   /* 0x0b */
  55.     { "Unknown", "Unknown" },   /* 0x0c */
  56.     { "Invalid", "Invalid" },   /* 0x0d */
  57.     { "Invalid", "Invalid" },   /* 0x0e */
  58.     { "Invalid", "Invalid" },   /* 0x0f */
  59.     { "MIPS", "R8000" },        /* 0x10 */
  60.     { "Invalid", "Invalid" },   /* 0x11 */
  61.     { "Invalid", "Invalid" },   /* 0x12 */
  62.     { "Invalid", "Invalid" },   /* 0x13 */
  63.     { "Invalid", "Invalid" },   /* 0x14 */
  64.     { "Invalid", "Invalid" },   /* 0x15 */
  65.     { "Invalid", "Invalid" },   /* 0x16 */
  66.     { "Invalid", "Invalid" },   /* 0x17 */
  67.     { "Invalid", "Invalid" },   /* 0x18 */
  68.     { "Invalid", "Invalid" },   /* 0x19 */
  69.     { "Invalid", "Invalid" },   /* 0x1a */
  70.     { "Invalid", "Invalid" },   /* 0x1b */
  71.     { "Invalid", "Invalid" },   /* 0x1c */
  72.     { "Invalid", "Invalid" },   /* 0x1d */
  73.     { "Invalid", "Invalid" },   /* 0x1e */
  74.     { "Invalid", "Invalid" },   /* 0x1f */
  75.     { "QED", "R4600" },     /* 0x20 */
  76.     { "Sony", "R3000" },        /* 0x21 */
  77.     { "Toshiba", "R3000" },     /* 0x22 */
  78.     { "NKK", "R3000" }      /* 0x23 */
  79. };
  80.  
  81. void cpu_arch_init(void)
  82. {
  83. }
  84.  
  85. void cpu_identify(void)
  86. {
  87.     CPU->arch.rev_num = cp0_prid_read() & 0xff;
  88.     CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
  89. }
  90.  
  91. void cpu_print_report(cpu_t *m)
  92. {
  93.     printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
  94.         m->id, imp_data[m->arch.imp_num].vendor, imp_data[m->arch.imp_num].model, m->arch.rev_num >> 4, m->arch.rev_num & 0xf, m->arch.imp_num);
  95. }
  96.