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  1. /*
  2.  * Copyright (c) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup mips32
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch.h>
  36. #include <arch/cp0.h>
  37. #include <arch/exception.h>
  38. #include <mm/as.h>
  39.  
  40. #include <userspace.h>
  41. #include <arch/console.h>
  42. #include <memstr.h>
  43. #include <proc/thread.h>
  44. #include <proc/uarg.h>
  45. #include <print.h>
  46. #include <syscall/syscall.h>
  47. #include <sysinfo/sysinfo.h>
  48.  
  49. #include <arch/interrupt.h>
  50. #include <console/chardev.h>
  51. #include <arch/barrier.h>
  52. #include <arch/debugger.h>
  53. #include <genarch/fb/fb.h>
  54. #include <genarch/fb/visuals.h>
  55. #include <macros.h>
  56. #include <ddi/device.h>
  57. #include <config.h>
  58. #include <string.h>
  59. #include <arch/drivers/msim.h>
  60.  
  61. #include <arch/asm/regname.h>
  62.  
  63. /* Size of the code jumping to the exception handler code
  64.  * - J+NOP
  65.  */
  66. #define EXCEPTION_JUMP_SIZE  8
  67.  
  68. #define TLB_EXC    ((char *) 0x80000000)
  69. #define NORM_EXC   ((char *) 0x80000180)
  70. #define CACHE_EXC  ((char *) 0x80000100)
  71.  
  72.  
  73. /* Why the linker moves the variable 64K away in assembler
  74.  * when not in .text section?
  75.  */
  76.  
  77. /* Stack pointer saved when entering user mode */
  78. uintptr_t supervisor_sp __attribute__ ((section (".text")));
  79.  
  80. count_t cpu_count = 0;
  81.  
  82. /** Performs mips32-specific initialization before main_bsp() is called. */
  83. void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
  84. {
  85.     /* Setup usermode */
  86.     init.cnt = bootinfo->cnt;
  87.    
  88.     count_t i;
  89.     for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
  90.         init.tasks[i].addr = bootinfo->tasks[i].addr;
  91.         init.tasks[i].size = bootinfo->tasks[i].size;
  92.         strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
  93.             CONFIG_TASK_NAME_BUFLEN);
  94.     }
  95.    
  96.     for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
  97.         if ((bootinfo->cpumap & (1 << i)) != 0)
  98.             cpu_count++;
  99.     }
  100. }
  101.  
  102. void arch_pre_mm_init(void)
  103. {
  104.     /* It is not assumed by default */
  105.     interrupts_disable();
  106.    
  107.     /* Initialize dispatch table */
  108.     exception_init();
  109.  
  110.     /* Copy the exception vectors to the right places */
  111.     memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
  112.     smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
  113.     memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
  114.     smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
  115.     memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
  116.     smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
  117.    
  118.     /*
  119.      * Switch to BEV normal level so that exception vectors point to the
  120.      * kernel. Clear the error level.
  121.      */
  122.     cp0_status_write(cp0_status_read() &
  123.         ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
  124.    
  125.     /*
  126.      * Mask all interrupts
  127.      */
  128.     cp0_mask_all_int();
  129.    
  130.     debugger_init();
  131. }
  132.  
  133. void arch_post_mm_init(void)
  134. {
  135.     interrupt_init();
  136.     msim_console(device_assign_devno());
  137. #ifdef CONFIG_FB
  138.     /* GXemul framebuffer */
  139.     fb_properties_t gxemul_prop = {
  140.         .addr = 0x12000000,
  141.         .offset = 0,
  142.         .x = 640,
  143.         .y = 480,
  144.         .scan = 1920,
  145.         .visual = VISUAL_BGR_8_8_8,
  146.     };
  147.     fb_init(&gxemul_prop);
  148. #endif
  149.  
  150. #ifdef MACHINE_msim
  151.     sysinfo_set_item_val("machine.msim", NULL, 1);
  152. #endif
  153.  
  154. #ifdef MACHINE_simics
  155.     sysinfo_set_item_val("machine.simics", NULL, 1);
  156. #endif
  157.  
  158. #ifdef MACHINE_bgxemul
  159.     sysinfo_set_item_val("machine.bgxemul", NULL, 1);
  160. #endif
  161.  
  162. #ifdef MACHINE_lgxemul
  163.     sysinfo_set_item_val("machine.lgxemul", NULL, 1);
  164. #endif
  165. }
  166.  
  167. void arch_post_cpu_init(void)
  168. {
  169. }
  170.  
  171. void arch_pre_smp_init(void)
  172. {
  173. }
  174.  
  175. void arch_post_smp_init(void)
  176. {
  177. }
  178.  
  179. void calibrate_delay_loop(void)
  180. {
  181. }
  182.  
  183. void userspace(uspace_arg_t *kernel_uarg)
  184. {
  185.     /* EXL = 1, UM = 1, IE = 1 */
  186.     cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
  187.         cp0_status_um_bit | cp0_status_ie_enabled_bit));
  188.     cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
  189.     userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
  190.         (uintptr_t) kernel_uarg->uspace_uarg,
  191.         (uintptr_t) kernel_uarg->uspace_entry);
  192.    
  193.     while (1);
  194. }
  195.  
  196. /** Perform mips32 specific tasks needed before the new task is run. */
  197. void before_task_runs_arch(void)
  198. {
  199. }
  200.  
  201. /** Perform mips32 specific tasks needed before the new thread is scheduled. */
  202. void before_thread_runs_arch(void)
  203. {
  204.     supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
  205.         SP_DELTA];
  206. }
  207.  
  208. void after_thread_ran_arch(void)
  209. {
  210. }
  211.  
  212. /** Set thread-local-storage pointer
  213.  *
  214.  * We have it currently in K1, it is
  215.  * possible to have it separately in the future.
  216.  */
  217. unative_t sys_tls_set(unative_t addr)
  218. {
  219.     return 0;
  220. }
  221.  
  222. void arch_reboot(void)
  223. {
  224.     ___halt();
  225.    
  226.     while (1);
  227. }
  228.  
  229. /** Construct function pointer
  230.  *
  231.  * @param fptr   function pointer structure
  232.  * @param addr   function address
  233.  * @param caller calling function address
  234.  *
  235.  * @return address of the function pointer
  236.  *
  237.  */
  238. void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
  239. {
  240.     return addr;
  241. }
  242.  
  243. /** @}
  244.  */
  245.