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  1. /*
  2.  * Copyright (c) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup arm32mm
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <mm/tlb.h>
  36. #include <arch/mm/asid.h>
  37. #include <arch/asm.h>
  38. #include <arch/types.h>
  39. #include <arch/mm/page.h>
  40.  
  41. /** Invalidate all entries in TLB. */
  42. void tlb_invalidate_all(void)
  43. {
  44.    
  45.   asm volatile (
  46.         "eor r1, r1\n"
  47.         "MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528
  48.        
  49.         ::: "r1"
  50.     );
  51. }
  52.  
  53. /** Invalidate all entries in TLB that belong to specified address space.
  54.  *
  55.  * @param asid This parameter is ignored as the ARM architecture doesn't support it.
  56.  */
  57. void tlb_invalidate_asid(asid_t asid)
  58. {
  59.     tlb_invalidate_all();
  60. }
  61.  
  62. /** Invalidate single entry in TLB
  63.  * @param page Virtual adress of the page
  64.  */
  65. static inline void invlpg(uintptr_t page)
  66. {
  67.     asm volatile (
  68.         "MCR p15, 0, %0, c8, c7, 1"
  69.        
  70.         : /* no output */
  71.         : "r"(page) /* input */
  72.     );
  73. }
  74.  
  75. /** Invalidate TLB entries for specified page range belonging to specified address space.
  76.  *
  77.  * @param asid This parameter is ignored as the ARM architecture doesn't support it.
  78.  * @param page Address of the first page whose entry is to be invalidated.
  79.  * @param cnt Number of entries to invalidate.
  80.  */
  81. void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
  82. {
  83.     unsigned int i;
  84.  
  85.     for (i = 0; i < cnt; i++)
  86.         invlpg(page + i * PAGE_SIZE);
  87. }
  88.  
  89. /** @}
  90.  */
  91.