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  1. /*
  2.  * Copyright (c) 2007 Michal Kebrt
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup arm32
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35.  
  36. #include <arch.h>
  37. #include <arch/boot.h>
  38. #include <config.h>
  39. #include <arch/console.h>
  40. #include <ddi/device.h>
  41. #include <genarch/fb/fb.h>
  42. #include <genarch/fb/visuals.h>
  43. #include <ddi/irq.h>
  44. #include <arch/debug/print.h>
  45. #include <print.h>
  46. #include <config.h>
  47. #include <interrupt.h>
  48. #include <arch/regutils.h>
  49. #include <arch/machine.h>
  50. #include <userspace.h>
  51.  
  52. bootinfo_t bootinfo;
  53. // // uintptr_t supervisor_sp /*__attribute__ ((section (".text")))*/;
  54. extern uintptr_t supervisor_sp;
  55.  
  56. void arch_pre_main(void)
  57. {
  58.     int i;
  59.  
  60.     init.cnt = bootinfo.cnt;
  61.  
  62.     for (i = 0; i < bootinfo.cnt; ++i) {
  63.         init.tasks[i].addr = bootinfo.tasks[i].addr;
  64.         init.tasks[i].size = bootinfo.tasks[i].size;
  65.     }
  66.    
  67. }
  68.  
  69. void arch_pre_mm_init(void)
  70. {
  71.     /* It is not assumed by default */
  72.     interrupts_disable();
  73.  
  74.     setup_exception_stacks();
  75.  
  76. }
  77.  
  78. void prefetch_exception_generator(void);
  79.  
  80. void arch_post_mm_init(void)
  81. {
  82.     machine_hw_map_init();
  83.  
  84.     /* Initialize dispatch table */
  85.     exception_init();
  86.  
  87.     interrupt_init();
  88.    
  89.     console_init(device_assign_devno());
  90.    
  91.     //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
  92.    
  93.     interrupts_enable();
  94.  
  95. }
  96.  
  97. void arch_post_cpu_init(void)
  98. {
  99.     /* TODO */
  100. }
  101.  
  102. void arch_pre_smp_init(void)
  103. {
  104.     /* TODO */
  105. }
  106.  
  107. void arch_post_smp_init(void)
  108. {
  109.     /* TODO */
  110. }
  111.  
  112. /** Perform arm32 specific tasks needed before the new task is run. */
  113. void before_task_runs_arch(void)
  114. {
  115.         tlb_invalidate_all();
  116.     /* TODO */
  117. }
  118.  
  119. /** Perform arm32 specific tasks needed before the new thread is scheduled. */
  120. void before_thread_runs_arch(void)
  121. {
  122.     supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
  123. }
  124.  
  125. void after_thread_ran_arch(void)
  126. {
  127.     /* TODO */
  128. }
  129.  
  130. /** Struct to hold general purpose register values */
  131. typedef struct {
  132.     uint32_t r0;
  133.     uint32_t r1;
  134.     uint32_t r2;
  135.     uint32_t r3;
  136.     uint32_t r4;
  137.     uint32_t r5;
  138.     uint32_t r6;
  139.     uint32_t r7;
  140.     uint32_t r8;
  141.     uint32_t r9;
  142.     uint32_t r10;
  143.     uint32_t r11;
  144.     uint32_t r12;
  145.     uint32_t sp;
  146.     uint32_t lr;
  147.     uint32_t pc;
  148. } ustate_t;
  149.  
  150.  
  151. /** Changes processor mode and jumps to the address specified in the first parameter.
  152.  *
  153.  *  \param kernel_uarg   userspace settings (entry point, stack, ...)
  154.  */
  155. void userspace(uspace_arg_t *kernel_uarg)
  156. {
  157.     dprintf("Userspace:  .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",
  158.         (unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,
  159.         kernel_uarg->uspace_stack);
  160.  
  161.     volatile ustate_t ustate;
  162.  
  163.     // set first parameter
  164.     ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
  165.  
  166.     // clear other registers
  167.     ustate.r1 = ustate.r2  = ustate.r3  = ustate.r4  =
  168.         ustate.r5 = ustate.r6  = ustate.r7  = ustate.r8  =
  169.         ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;
  170.  
  171.     ustate.lr = 3;
  172.  
  173.     //set user stack
  174.     ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) +
  175.             PAGE_SIZE - sizeof(void*);
  176.     //on the bottom of stack there is pointer to TLS
  177.    
  178.     //set where uspace execution starts
  179.     ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
  180.  
  181.     //status register in user mode
  182.     ipl_t cpsr = current_status_reg_read();
  183.     cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE;
  184.    
  185.     ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | SUPERVISOR_MODE;
  186.  
  187.     asm __volatile__ (
  188.         // save pointer into ustate struct
  189.         "mov r0, %0         \n"
  190.         // save cspr
  191.         "mov r1, %1         \n"
  192.         // change mode into any exception mode
  193.         "msr cpsr_c, %2         \n"
  194.         // set saved cpsr
  195.         "msr spsr_c, r1 \n"
  196.  
  197.         "mov sp, r0 \n"
  198.         // replace almost all registers
  199.         "ldmfd sp!, {r0-r12, sp, lr}^\n"
  200.         //jump to the usermode
  201.         "ldmfd sp!, {pc}^"
  202.     : // no output
  203.     : "r"(&ustate), "r"(cpsr), "r"(tmpsr) //
  204.     : "r0","r1"
  205.     );
  206.  
  207.     while(1) ;
  208. }
  209.  
  210.  
  211. void cpu_halt(void)
  212. {
  213.     machine_cpu_halt();
  214. }
  215.  
  216. /** @}
  217.  */
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