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  1. /*
  2.  * Copyright (c) 2007 Michal Kebrt
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup arm32
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35.  
  36. #include <arch.h>
  37. #include <arch/boot.h>
  38. #include <config.h>
  39. #include <arch/console.h>
  40. #include <ddi/device.h>
  41. #include <genarch/fb/fb.h>
  42. #include <genarch/fb/visuals.h>
  43. #include <ddi/irq.h>
  44.  
  45. #include <arch/debug_print/print.h>
  46. #include <print.h>
  47. #include <config.h>
  48. #include <interrupt.h>
  49. #include <arch/regutils.h>
  50. #include <arch/machine.h>
  51. #include <userspace.h>
  52.  
  53. bootinfo_t bootinfo;
  54. // // uintptr_t supervisor_sp /*__attribute__ ((section (".text")))*/;
  55. extern uintptr_t supervisor_sp;
  56.  
  57. void arch_pre_main(void)
  58. {
  59.     int i;
  60.  
  61.     init.cnt = bootinfo.cnt;
  62.  
  63.     for (i = 0; i < bootinfo.cnt; ++i) {
  64.         init.tasks[i].addr = bootinfo.tasks[i].addr;
  65.         init.tasks[i].size = bootinfo.tasks[i].size;
  66.     }
  67.    
  68. }
  69.  
  70. void arch_pre_mm_init(void)
  71. {
  72.     /* It is not assumed by default */
  73.     interrupts_disable();
  74.  
  75.     setup_exception_stacks();
  76.  
  77. }
  78.  
  79. void prefetch_exception_generator(void);
  80.  
  81. void arch_post_mm_init(void)
  82. {
  83.     machine_hw_map_init();
  84.  
  85.     /* Initialize dispatch table */
  86.     exception_init();
  87.  
  88.     interrupt_init();
  89.    
  90.     console_init(device_assign_devno());
  91.    
  92.     //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
  93.    
  94.     interrupts_enable();
  95.  
  96. }
  97.  
  98. void arch_post_cpu_init(void)
  99. {
  100.     /* TODO */
  101. }
  102.  
  103. void arch_pre_smp_init(void)
  104. {
  105.     /* TODO */
  106. }
  107.  
  108. void arch_post_smp_init(void)
  109. {
  110.     /* TODO */
  111. }
  112.  
  113. /** Perform arm32 specific tasks needed before the new task is run. */
  114. void before_task_runs_arch(void)
  115. {
  116.         tlb_invalidate_all();
  117.     /* TODO */
  118. }
  119.  
  120. /** Perform arm32 specific tasks needed before the new thread is scheduled. */
  121. void before_thread_runs_arch(void)
  122. {
  123.     supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
  124. }
  125.  
  126. void after_thread_ran_arch(void)
  127. {
  128.     /* TODO */
  129. }
  130.  
  131. /** Struct to hold general purpose register values */
  132. typedef struct {
  133.     uint32_t r0;
  134.     uint32_t r1;
  135.     uint32_t r2;
  136.     uint32_t r3;
  137.     uint32_t r4;
  138.     uint32_t r5;
  139.     uint32_t r6;
  140.     uint32_t r7;
  141.     uint32_t r8;
  142.     uint32_t r9;
  143.     uint32_t r10;
  144.     uint32_t r11;
  145.     uint32_t r12;
  146.     uint32_t sp;
  147.     uint32_t lr;
  148.     uint32_t pc;
  149. } ustate_t;
  150.  
  151.  
  152. /** Changes processor mode and jumps to the address specified in the first parameter.
  153.  *
  154.  *  \param kernel_uarg   userspace settings (entry point, stack, ...)
  155.  */
  156. void userspace(uspace_arg_t *kernel_uarg)
  157. {
  158.     dprintf("Userspace:  .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",
  159.         (unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,
  160.         kernel_uarg->uspace_stack);
  161.  
  162.     volatile ustate_t ustate;
  163.  
  164.     // set first parameter
  165.     ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
  166.  
  167.     // clear other registers
  168.     ustate.r1 = ustate.r2  = ustate.r3  = ustate.r4  =
  169.         ustate.r5 = ustate.r6  = ustate.r7  = ustate.r8  =
  170.         ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;
  171.  
  172.     ustate.lr = 3;
  173.  
  174.     //set user stack
  175.     ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) +
  176.             PAGE_SIZE - sizeof(void*);
  177.     //on the bottom of stack there is pointer to TLS
  178.    
  179.     //set where uspace execution starts
  180.     ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
  181.  
  182.     //status register in user mode
  183.     ipl_t cpsr = current_status_reg_read();
  184.     cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE;
  185.    
  186.     ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | SUPERVISOR_MODE;
  187.  
  188.     asm __volatile__ (
  189.         // save pointer into ustate struct
  190.         "mov r0, %0         \n"
  191.         // save cspr
  192.         "mov r1, %1         \n"
  193.         // change mode into any exception mode
  194.         "msr cpsr_c, %2         \n"
  195.         // set saved cpsr
  196.         "msr spsr_c, r1 \n"
  197.  
  198.         "mov sp, r0 \n"
  199.         // replace almost all registers
  200.         "ldmfd sp!, {r0-r12, sp, lr}^\n"
  201.         //jump to the usermode
  202.         "ldmfd sp!, {pc}^"
  203.     : // no output
  204.     : "r"(&ustate), "r"(cpsr), "r"(tmpsr) //
  205.     : "r0","r1"
  206.     );
  207.  
  208.     while(1) ;
  209. }
  210.  
  211.  
  212. void cpu_halt(void)
  213. {
  214.     machine_cpu_halt();
  215. }
  216.  
  217. /** @}
  218.  */
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