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  1. /*
  2.  * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup arm32boot
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include "mm.h"
  36.  
  37. /** Initializes section page table entry.
  38.  *
  39.  *  Will be readable/writable by kernel with no access from user mode.
  40.  *  Will belong to domain 0. No cache or buffering is enabled.
  41.  *  
  42.  *  \param pte    page table entry to set
  43.  *  \param frame  first frame in the section (frame number)
  44.  *  \note  If frame is not 1MB aligned, first lower 1MB aligned frame will be used.
  45.  */  
  46. static void init_pte_level0_section(pte_level0_section* pte, unsigned frame){
  47.     pte->descriptor_type   = PTE_DESCRIPTOR_SECTION;
  48.     pte->bufferable        = 0; // disable
  49.     pte->cacheable         = 0;
  50.     pte->machine_depend    = 0;
  51.     pte->domain            = 0;
  52.     pte->should_be_zero_1  = 0;
  53.     pte->access_permission = PTE_AP_USER_NO_KERNEL_RW; 
  54.     pte->should_be_zero_2  = 0;
  55.     pte->section_base_addr = (frame << FRAME_WIDTH) >> 20;
  56. };
  57.  
  58.  
  59. void mm_kernel_mapping(void) {
  60.     int i;
  61.  
  62.     const unsigned int first_kernel_section = ADDR2PFN(PA2KA(0)) / FRAMES_PER_SECTION;
  63.     // create 1:1 mapping (in lower 2GB)
  64.     for(i = 0; i < first_kernel_section; i++) {
  65.         init_pte_level0_section(&page_table[i], i * FRAMES_PER_SECTION);
  66.     }
  67.  
  68.     // create kernel mapping (in upper 2GB), physical addresses starting from 0
  69.     for(i = first_kernel_section; i < PTL0_ENTRIES_ARCH; i++) {
  70.         init_pte_level0_section(&page_table[i], (i - first_kernel_section) * FRAMES_PER_SECTION);
  71.     }
  72.    
  73.     set_ptl0_address(page_table);
  74.    
  75.     // enable paging
  76.     asm volatile (
  77.         "ldr r0, =0x55555555       \n"
  78.         "mcr p15, 0, r0, c3, c0, 0 \n" // TODO: comment: set domain access rights to client <==> take rights from page tables
  79.         "mrc p15, 0, r0, c1, c0, 0 \n" // get current settings of system
  80.         "ldr r1, =0xFFFFFE8D       \n" // mask to disable aligment checks; system & rom bit disabled
  81.         "and r0, r0, r1            \n"
  82.         "ldr r1, =0x00000001       \n" // mask to enable paging
  83.         "orr r0, r0, r1            \n"
  84.         "mcr p15, 0, r0, c1, c0, 0 \n" // store settings
  85.         :
  86.         :
  87.         : "r0", "r1"
  88.     );
  89. };
  90.  
  91. /** @}
  92.  */
  93.  
  94.