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  1. /*
  2.  * Copyright (C) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch/exception.h>
  30. #include <arch/interrupt.h>
  31. #include <panic.h>
  32. #include <arch/cp0.h>
  33. #include <arch/types.h>
  34. #include <arch.h>
  35. #include <debug.h>
  36.  
  37. void exception(struct exception_regdump *pstate)
  38. {
  39.     int excno;
  40.     __u32 epc_shift = 0;
  41.  
  42.     ASSERT(CPU != NULL);
  43.  
  44.     /*
  45.      * NOTE ON OPERATION ORDERING
  46.      *
  47.      * On entry, cpu_priority_high() must be called before
  48.      * exception bit is cleared.
  49.      */
  50.  
  51.     cpu_priority_high();
  52.     cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
  53.                         cp0_status_um_bit));
  54.  
  55.     /* Save pstate so that the threads can access it */
  56.     /* If THREAD->pstate is set, this is nested exception,
  57.      * do not rewrite it
  58.      */
  59.     if (THREAD && !THREAD->pstate)
  60.         THREAD->pstate = pstate;
  61.  
  62.     /* decode exception number and process the exception */
  63.     switch (excno = (cp0_cause_read() >> 2) & 0x1f) {
  64.         case EXC_Int:
  65.             interrupt();
  66.             break;
  67.         case EXC_TLBL:
  68.         case EXC_TLBS:
  69.             tlb_invalid(pstate);
  70.             break;
  71.         case EXC_CpU:
  72. #ifdef FPU_LAZY    
  73.             scheduler_fpu_lazy_request();
  74. #else
  75.             panic("unhandled Coprocessor Unusable Exception\n");
  76. #endif
  77.             break;
  78.         case EXC_Mod:
  79.             panic("unhandled TLB Modification Exception\n");
  80.             break;
  81.         case EXC_AdEL:
  82.             panic("unhandled Address Error Exception - load or instruction fetch\n");
  83.             break;
  84.         case EXC_AdES:
  85.             panic("unhandled Address Error Exception - store\n");
  86.             break;
  87.         case EXC_IBE:
  88.             panic("unhandled Bus Error Exception - fetch instruction\n");
  89.             break;
  90.         case EXC_DBE:
  91.             panic("unhandled Bus Error Exception - data reference: load or store\n");
  92.             break;
  93.         case EXC_Bp:
  94.             /* it is necessary to not re-execute BREAK instruction after returning from Exception handler
  95.                (see page 138 in R4000 Manual for more information) */
  96.             epc_shift = 4;
  97.             break;
  98.         case EXC_RI:
  99.             panic("unhandled Reserved Instruction Exception\n");
  100.             break;
  101.         case EXC_Ov:
  102.             panic("unhandled Arithmetic Overflow Exception\n");
  103.             break;
  104.         case EXC_Tr:
  105.             panic("unhandled Trap Exception\n");
  106.             break;
  107.         case EXC_VCEI:
  108.             panic("unhandled Virtual Coherency Exception - instruction\n");
  109.             break;
  110.         case EXC_FPE:
  111.             panic("unhandled Floating-Point Exception\n");
  112.             break;
  113.         case EXC_WATCH:
  114.             panic("unhandled reference to WatchHi/WatchLo address\n");
  115.             break;
  116.         case EXC_VCED:
  117.             panic("unhandled Virtual Coherency Exception - data\n");
  118.             break;
  119.         default:
  120.             panic("unhandled exception %d\n", excno);
  121.     }
  122.    
  123.     pstate->epc += epc_shift;
  124.     /* Set to NULL, so that we can still support nested
  125.      * exceptions
  126.      * TODO: We should probably set EXL bit before this command,
  127.      * nesting. On the other hand, if some exception occurs between
  128.      * here and ERET, it won't set anything on the pstate anyway.
  129.      */
  130.     if (THREAD)
  131.         THREAD->pstate = NULL;
  132. }
  133.