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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #ifndef __mips_PAGE_H__
  30. #define __mips_PAGE_H__
  31.  
  32. #include <arch/mm/tlb.h>
  33. #include <mm/page.h>
  34. #include <arch/mm/frame.h>
  35. #include <arch/types.h>
  36.  
  37. #define PAGE_SIZE   FRAME_SIZE
  38.  
  39. #define KA2PA(x)    (((__address) (x)) - 0x80000000)
  40. #define PA2KA(x)    (((__address) (x)) + 0x80000000)
  41.  
  42. /*
  43.  * Implementation of generic 4-level page table interface.
  44.  * NOTE: this implementation is under construction
  45.  *
  46.  * Page table layout:
  47.  * - 32-bit virtual addresses
  48.  * - Offset is 14 bits => pages are 16K long
  49.  * - PTE's use the same format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long
  50.  * - PTL0 has 64 entries (6 bits)
  51.  * - PTL1 is not used
  52.  * - PTL2 is not used
  53.  * - PTL3 has 4096 entries (12 bits)
  54.  */
  55.  
  56. #define PTL0_INDEX_ARCH(vaddr)  ((vaddr)>>26)
  57. #define PTL1_INDEX_ARCH(vaddr)  0
  58. #define PTL2_INDEX_ARCH(vaddr)  0
  59. #define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>14)&0xfff)
  60.  
  61. #define GET_PTL0_ADDRESS_ARCH()         (PTL0)
  62. #define SET_PTL0_ADDRESS_ARCH(ptl0)     (PTL0 = (pte_t *)(ptl0))
  63.  
  64. #define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *)(ptl0))[(i)].pfn<<14)
  65. #define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
  66. #define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
  67. #define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *)(ptl3))[(i)].pfn<<14)
  68.  
  69. #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *)(ptl0))[(i)].pfn = (a)>>14)
  70. #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
  71. #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
  72. #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *)(ptl3))[(i)].pfn = (a)>>14)
  73.  
  74. #define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
  75. #define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
  76. #define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
  77. #define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
  78.  
  79. #define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
  80. #define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
  81. #define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
  82. #define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
  83.  
  84. static inline int get_pt_flags(pte_t *pt, index_t i)
  85. {
  86.     pte_t *p = &pt[i];
  87.    
  88.     return (
  89.         ((p->c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) |
  90.         ((!p->v)<<PAGE_PRESENT_SHIFT) |
  91.         (1<<PAGE_USER_SHIFT) |
  92.         (1<<PAGE_READ_SHIFT) |
  93.         ((p->d)<<PAGE_WRITE_SHIFT) |
  94.         (1<<PAGE_EXEC_SHIFT)
  95.     );
  96.        
  97. }
  98.  
  99. static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
  100. {
  101.     pte_t *p = &pt[i];
  102.    
  103.     p->c = (flags & PAGE_CACHEABLE) != 0 ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED;
  104.     p->v = !(flags & PAGE_NOT_PRESENT);
  105.     p->d = (flags & PAGE_WRITE) != 0;
  106. }
  107.  
  108. extern void page_arch_init(void);
  109.  
  110. extern pte_t *PTL0;
  111.  
  112. #endif
  113.