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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #ifndef __ia32_ASM_H__
  30. #define __ia32_ASM_H__
  31.  
  32. #include <arch/types.h>
  33. #include <typedefs.h>
  34. #include <mm/page.h>
  35. #include <synch/spinlock.h>
  36. #include <arch/boot/memmap.h>
  37.  
  38. extern __u32 interrupt_handler_size;
  39.  
  40. extern void paging_on(void);
  41.  
  42. extern void interrupt_handlers(void);
  43.  
  44. extern __u8 inb(int port);
  45. extern __u16 inw(int port);
  46. extern __u32 inl(int port);
  47.  
  48. extern void outb(int port, __u8 b);
  49. extern void outw(int port, __u16 w);
  50. extern void outl(int port, __u32 l);
  51.  
  52. extern void enable_l_apic_in_msr(void);
  53.  
  54. /** Halt CPU
  55.  *
  56.  * Halt the current CPU until interrupt event.
  57.  */
  58. static inline void cpu_halt(void) { __asm__("hlt"); };
  59. static inline void cpu_sleep(void) { __asm__("hlt"); };
  60.  
  61. /** Read CR2
  62.  *
  63.  * Return value in CR2
  64.  *
  65.  * @return Value read.
  66.  */
  67. static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }
  68.  
  69. /** Write CR3
  70.  *
  71.  * Write value to CR3.
  72.  *
  73.  * @param v Value to be written.
  74.  */
  75. static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
  76.  
  77. /** Read CR3
  78.  *
  79.  * Return value in CR3
  80.  *
  81.  * @return Value read.
  82.  */
  83. static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }
  84.  
  85. /** Write DR0
  86.  *
  87.  * Write value to DR0.
  88.  *
  89.  * @param v Value to be written.
  90.  */
  91. static inline void write_dr0(__u32 v) { __asm__ volatile ("movl %0,%%dr0\n" : : "r" (v)); }
  92.  
  93. /** Read DR0
  94.  *
  95.  * Return value in DR0
  96.  *
  97.  * @return Value read.
  98.  */
  99. static inline __u32 read_dr0(void) { __u32 v; __asm__ volatile ("movl %%dr0,%0" : "=r" (v)); return v; }
  100.  
  101. /** Set priority level low
  102.  *
  103.  * Enable interrupts and return previous
  104.  * value of EFLAGS.
  105.  */
  106. static inline pri_t cpu_priority_low(void) {
  107.     pri_t v;
  108.     __asm__ volatile (
  109.         "pushf\n"
  110.         "popl %0\n"
  111.         "sti\n"
  112.         : "=r" (v)
  113.     );
  114.     return v;
  115. }
  116.  
  117. /** Set priority level high
  118.  *
  119.  * Disable interrupts and return previous
  120.  * value of EFLAGS.
  121.  */
  122. static inline pri_t cpu_priority_high(void) {
  123.     pri_t v;
  124.     __asm__ volatile (
  125.         "pushf\n"
  126.         "popl %0\n"
  127.         "cli\n"
  128.         : "=r" (v)
  129.     );
  130.     return v;
  131. }
  132.  
  133. /** Restore priority level
  134.  *
  135.  * Restore EFLAGS.
  136.  */
  137. static inline void cpu_priority_restore(pri_t pri) {
  138.     __asm__ volatile (
  139.         "pushl %0\n"
  140.         "popf\n"
  141.         : : "r" (pri)
  142.     );
  143. }
  144.  
  145. /** Return raw priority level
  146.  *
  147.  * Return EFLAFS.
  148.  */
  149. static inline pri_t cpu_priority_read(void) {
  150.     pri_t v;
  151.     __asm__ volatile (
  152.         "pushf\n"
  153.         "popl %0\n"
  154.         : "=r" (v)
  155.     );
  156.     return v;
  157. }
  158.  
  159. #endif
  160.