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| 1 | # |
1 | # |
| 2 | # Copyright (C) 2003-2004 Jakub Jermar |
2 | # Copyright (C) 2003-2004 Jakub Jermar |
| 3 | # All rights reserved. |
3 | # All rights reserved. |
| 4 | # |
4 | # |
| 5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
| 6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
| 7 | # are met: |
7 | # are met: |
| 8 | # |
8 | # |
| 9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
| 10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
| 11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
| 12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
| 13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
| 14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
| 15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
| 16 | # |
16 | # |
| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | # |
27 | # |
| 28 | 28 | ||
| 29 | .text |
29 | .text |
| 30 | 30 | ||
| 31 | .set noat |
31 | .set noat |
| 32 | .set noreorder |
32 | .set noreorder |
| 33 | 33 | ||
| 34 | 34 | ||
| 35 | #include <arch/asm/regname.h> |
35 | #include <arch/asm/regname.h> |
| 36 | #include <libarch/context_offset.h> |
36 | #include <libarch/context_offset.h> |
| 37 | 37 | ||
| 38 | .global context_save |
38 | .global context_save |
| 39 | .global context_restore |
39 | .global context_restore |
| 40 | 40 | ||
| 41 | .macro CONTEXT_STORE r |
41 | .macro CONTEXT_STORE r |
| 42 | sw $s0,OFFSET_S0(\r) |
42 | sw $s0,OFFSET_S0(\r) |
| 43 | sw $s1,OFFSET_S1(\r) |
43 | sw $s1,OFFSET_S1(\r) |
| 44 | sw $s2,OFFSET_S2(\r) |
44 | sw $s2,OFFSET_S2(\r) |
| 45 | sw $s3,OFFSET_S3(\r) |
45 | sw $s3,OFFSET_S3(\r) |
| 46 | sw $s4,OFFSET_S4(\r) |
46 | sw $s4,OFFSET_S4(\r) |
| 47 | sw $s5,OFFSET_S5(\r) |
47 | sw $s5,OFFSET_S5(\r) |
| 48 | sw $s6,OFFSET_S6(\r) |
48 | sw $s6,OFFSET_S6(\r) |
| 49 | sw $s7,OFFSET_S7(\r) |
49 | sw $s7,OFFSET_S7(\r) |
| 50 | sw $s8,OFFSET_S8(\r) |
50 | sw $s8,OFFSET_S8(\r) |
| 51 | sw $gp,OFFSET_GP(\r) |
51 | sw $gp,OFFSET_GP(\r) |
| 52 | sw $k1,OFFSET_TLS(\r) |
52 | sw $k1,OFFSET_TLS(\r) |
| - | 53 | ||
| - | 54 | #ifdef CONFIG_MIPS_FPU |
|
| - | 55 | mfc1 $t0,$20 |
|
| - | 56 | sw $t0, OFFSET_F20(\r) |
|
| - | 57 | ||
| - | 58 | mfc1 $t0,$21 |
|
| - | 59 | sw $t0, OFFSET_F21(\r) |
|
| - | 60 | ||
| - | 61 | mfc1 $t0,$22 |
|
| - | 62 | sw $t0, OFFSET_F22(\r) |
|
| - | 63 | ||
| - | 64 | mfc1 $t0,$23 |
|
| - | 65 | sw $t0, OFFSET_F23(\r) |
|
| - | 66 | ||
| - | 67 | mfc1 $t0,$24 |
|
| - | 68 | sw $t0, OFFSET_F24(\r) |
|
| - | 69 | ||
| - | 70 | mfc1 $t0,$25 |
|
| - | 71 | sw $t0, OFFSET_F25(\r) |
|
| - | 72 | ||
| - | 73 | mfc1 $t0,$26 |
|
| - | 74 | sw $t0, OFFSET_F26(\r) |
|
| - | 75 | ||
| - | 76 | mfc1 $t0,$27 |
|
| - | 77 | sw $t0, OFFSET_F27(\r) |
|
| - | 78 | ||
| - | 79 | mfc1 $t0,$28 |
|
| - | 80 | sw $t0, OFFSET_F28(\r) |
|
| - | 81 | ||
| - | 82 | mfc1 $t0,$29 |
|
| - | 83 | sw $t0, OFFSET_F29(\r) |
|
| 53 | 84 | ||
| - | 85 | mfc1 $t0,$30 |
|
| - | 86 | sw $t0, OFFSET_F30(\r) |
|
| - | 87 | #endif |
|
| - | 88 | ||
| 54 | sw $ra,OFFSET_PC(\r) |
89 | sw $ra,OFFSET_PC(\r) |
| 55 | sw $sp,OFFSET_SP(\r) |
90 | sw $sp,OFFSET_SP(\r) |
| 56 | .endm |
91 | .endm |
| 57 | 92 | ||
| 58 | .macro CONTEXT_LOAD r |
93 | .macro CONTEXT_LOAD r |
| 59 | lw $s0,OFFSET_S0(\r) |
94 | lw $s0,OFFSET_S0(\r) |
| 60 | lw $s1,OFFSET_S1(\r) |
95 | lw $s1,OFFSET_S1(\r) |
| 61 | lw $s2,OFFSET_S2(\r) |
96 | lw $s2,OFFSET_S2(\r) |
| 62 | lw $s3,OFFSET_S3(\r) |
97 | lw $s3,OFFSET_S3(\r) |
| 63 | lw $s4,OFFSET_S4(\r) |
98 | lw $s4,OFFSET_S4(\r) |
| 64 | lw $s5,OFFSET_S5(\r) |
99 | lw $s5,OFFSET_S5(\r) |
| 65 | lw $s6,OFFSET_S6(\r) |
100 | lw $s6,OFFSET_S6(\r) |
| 66 | lw $s7,OFFSET_S7(\r) |
101 | lw $s7,OFFSET_S7(\r) |
| 67 | lw $s8,OFFSET_S8(\r) |
102 | lw $s8,OFFSET_S8(\r) |
| 68 | lw $gp,OFFSET_GP(\r) |
103 | lw $gp,OFFSET_GP(\r) |
| 69 | lw $k1,OFFSET_TLS(\r) |
104 | lw $k1,OFFSET_TLS(\r) |
| - | 105 | ||
| - | 106 | #ifdef CONFIG_MIPS_FPU |
|
| - | 107 | lw $t0, OFFSET_F20(\r) |
|
| - | 108 | mtc1 $t0,$20 |
|
| - | 109 | ||
| - | 110 | lw $t0, OFFSET_F21(\r) |
|
| - | 111 | mtc1 $t0,$21 |
|
| - | 112 | ||
| - | 113 | lw $t0, OFFSET_F22(\r) |
|
| - | 114 | mtc1 $t0,$22 |
|
| - | 115 | ||
| - | 116 | lw $t0, OFFSET_F23(\r) |
|
| - | 117 | mtc1 $t0,$23 |
|
| - | 118 | ||
| - | 119 | lw $t0, OFFSET_F24(\r) |
|
| - | 120 | mtc1 $t0,$24 |
|
| - | 121 | ||
| - | 122 | lw $t0, OFFSET_F25(\r) |
|
| - | 123 | mtc1 $t0,$25 |
|
| - | 124 | ||
| - | 125 | lw $t0, OFFSET_F26(\r) |
|
| - | 126 | mtc1 $t0,$26 |
|
| - | 127 | ||
| - | 128 | lw $t0, OFFSET_F27(\r) |
|
| - | 129 | mtc1 $t0,$27 |
|
| - | 130 | ||
| - | 131 | lw $t0, OFFSET_F28(\r) |
|
| - | 132 | mtc1 $t0,$28 |
|
| - | 133 | ||
| - | 134 | lw $t0, OFFSET_F29(\r) |
|
| - | 135 | mtc1 $t0,$29 |
|
| - | 136 | ||
| - | 137 | lw $t0, OFFSET_F30(\r) |
|
| - | 138 | mtc1 $t0,$30 |
|
| - | 139 | #endif |
|
| 70 | 140 | ||
| 71 | lw $ra,OFFSET_PC(\r) |
141 | lw $ra,OFFSET_PC(\r) |
| 72 | lw $sp,OFFSET_SP(\r) |
142 | lw $sp,OFFSET_SP(\r) |
| 73 | .endm |
143 | .endm |
| 74 | 144 | ||
| 75 | context_save: |
145 | context_save: |
| 76 | CONTEXT_STORE $a0 |
146 | CONTEXT_STORE $a0 |
| 77 | 147 | ||
| 78 | # context_save returns 1 |
148 | # context_save returns 1 |
| 79 | j $ra |
149 | j $ra |
| 80 | li $v0, 1 |
150 | li $v0, 1 |
| 81 | 151 | ||
| 82 | context_restore: |
152 | context_restore: |
| 83 | CONTEXT_LOAD $a0 |
153 | CONTEXT_LOAD $a0 |
| 84 | 154 | ||
| 85 | # Just for the jump into first function, but one instruction |
155 | # Just for the jump into first function, but one instruction |
| 86 | # should not bother us |
156 | # should not bother us |
| 87 | move $t9, $ra |
157 | move $t9, $ra |
| 88 | # context_restore returns 0 |
158 | # context_restore returns 0 |
| 89 | j $ra |
159 | j $ra |
| 90 | xor $v0, $v0 |
160 | xor $v0, $v0 |
| 91 | 161 | ||
| 92 | 162 | ||