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/*
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/*
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 * Copyright (C) 2005 Jakub Jermar
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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 /** @addtogroup sparc64   
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/** @addtogroup sparc64interrupt
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 * @{
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 * @{
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 */
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 */
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/** @file
-
 
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 */
-
 
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-
 
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/**
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/**
-
 
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 * @file
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 * This file contains register window trap handlers.
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 * @brief This file contains register window trap handlers.
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 */
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 */
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#ifndef __sparc64_REGWIN_H__
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#ifndef __sparc64_REGWIN_H__
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#define __sparc64_REGWIN_H__
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#define __sparc64_REGWIN_H__
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#include <arch/stack.h>
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#include <arch/stack.h>
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#define TT_CLEAN_WINDOW         0x24
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#define TT_CLEAN_WINDOW         0x24
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#define TT_SPILL_0_NORMAL       0x80
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#define TT_SPILL_0_NORMAL       0x80
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#define TT_FILL_0_NORMAL        0xc0
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#define TT_FILL_0_NORMAL        0xc0
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#define REGWIN_HANDLER_SIZE     128
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#define REGWIN_HANDLER_SIZE     128
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#define CLEAN_WINDOW_HANDLER_SIZE   REGWIN_HANDLER_SIZE
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#define CLEAN_WINDOW_HANDLER_SIZE   REGWIN_HANDLER_SIZE
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#define SPILL_HANDLER_SIZE      REGWIN_HANDLER_SIZE
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#define SPILL_HANDLER_SIZE      REGWIN_HANDLER_SIZE
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#define FILL_HANDLER_SIZE       REGWIN_HANDLER_SIZE
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#define FILL_HANDLER_SIZE       REGWIN_HANDLER_SIZE
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/** Window Save Area offsets. */
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/** Window Save Area offsets. */
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#define L0_OFFSET   0
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#define L0_OFFSET   0
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#define L1_OFFSET   8
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#define L1_OFFSET   8
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#define L2_OFFSET   16
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#define L2_OFFSET   16
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#define L3_OFFSET   24
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#define L3_OFFSET   24
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#define L4_OFFSET   32
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#define L4_OFFSET   32
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#define L5_OFFSET   40
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#define L5_OFFSET   40
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#define L6_OFFSET   48
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#define L6_OFFSET   48
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#define L7_OFFSET   56
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#define L7_OFFSET   56
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#define I0_OFFSET   64
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#define I0_OFFSET   64
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#define I1_OFFSET   72
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#define I1_OFFSET   72
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#define I2_OFFSET   80
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#define I2_OFFSET   80
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#define I3_OFFSET   88
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#define I3_OFFSET   88
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#define I4_OFFSET   96
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#define I4_OFFSET   96
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#define I5_OFFSET   104
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#define I5_OFFSET   104
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#define I6_OFFSET   112
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#define I6_OFFSET   112
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#define I7_OFFSET   120
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#define I7_OFFSET   120
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#ifdef __ASM__
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#ifdef __ASM__
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.macro SPILL_NORMAL_HANDLER
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.macro SPILL_NORMAL_HANDLER
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    stx %l0, [%sp + STACK_BIAS + L0_OFFSET]
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    stx %l0, [%sp + STACK_BIAS + L0_OFFSET]
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    stx %l1, [%sp + STACK_BIAS + L1_OFFSET]
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    stx %l1, [%sp + STACK_BIAS + L1_OFFSET]
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    stx %l2, [%sp + STACK_BIAS + L2_OFFSET]
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    stx %l2, [%sp + STACK_BIAS + L2_OFFSET]
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    stx %l3, [%sp + STACK_BIAS + L3_OFFSET]
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    stx %l3, [%sp + STACK_BIAS + L3_OFFSET]
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    stx %l4, [%sp + STACK_BIAS + L4_OFFSET]
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    stx %l4, [%sp + STACK_BIAS + L4_OFFSET]
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    stx %l5, [%sp + STACK_BIAS + L5_OFFSET]
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    stx %l5, [%sp + STACK_BIAS + L5_OFFSET]
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    stx %l6, [%sp + STACK_BIAS + L6_OFFSET]
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    stx %l6, [%sp + STACK_BIAS + L6_OFFSET]
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    stx %l7, [%sp + STACK_BIAS + L7_OFFSET]
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    stx %l7, [%sp + STACK_BIAS + L7_OFFSET]
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    stx %i0, [%sp + STACK_BIAS + I0_OFFSET]
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    stx %i0, [%sp + STACK_BIAS + I0_OFFSET]
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    stx %i1, [%sp + STACK_BIAS + I1_OFFSET]
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    stx %i1, [%sp + STACK_BIAS + I1_OFFSET]
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    stx %i2, [%sp + STACK_BIAS + I2_OFFSET]
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    stx %i2, [%sp + STACK_BIAS + I2_OFFSET]
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    stx %i3, [%sp + STACK_BIAS + I3_OFFSET]
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    stx %i3, [%sp + STACK_BIAS + I3_OFFSET]
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    stx %i4, [%sp + STACK_BIAS + I4_OFFSET]
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    stx %i4, [%sp + STACK_BIAS + I4_OFFSET]
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    stx %i5, [%sp + STACK_BIAS + I5_OFFSET]
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    stx %i5, [%sp + STACK_BIAS + I5_OFFSET]
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    stx %i6, [%sp + STACK_BIAS + I6_OFFSET]
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    stx %i6, [%sp + STACK_BIAS + I6_OFFSET]
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    stx %i7, [%sp + STACK_BIAS + I7_OFFSET]
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    stx %i7, [%sp + STACK_BIAS + I7_OFFSET]
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    saved
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    saved
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    retry
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    retry
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.endm
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.endm
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.macro FILL_NORMAL_HANDLER
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.macro FILL_NORMAL_HANDLER
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    ldx [%sp + STACK_BIAS + L0_OFFSET], %l0
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    ldx [%sp + STACK_BIAS + L0_OFFSET], %l0
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    ldx [%sp + STACK_BIAS + L1_OFFSET], %l1
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    ldx [%sp + STACK_BIAS + L1_OFFSET], %l1
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    ldx [%sp + STACK_BIAS + L2_OFFSET], %l2
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    ldx [%sp + STACK_BIAS + L2_OFFSET], %l2
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    ldx [%sp + STACK_BIAS + L3_OFFSET], %l3
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    ldx [%sp + STACK_BIAS + L3_OFFSET], %l3
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    ldx [%sp + STACK_BIAS + L4_OFFSET], %l4
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    ldx [%sp + STACK_BIAS + L4_OFFSET], %l4
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    ldx [%sp + STACK_BIAS + L5_OFFSET], %l5
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    ldx [%sp + STACK_BIAS + L5_OFFSET], %l5
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    ldx [%sp + STACK_BIAS + L6_OFFSET], %l6
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    ldx [%sp + STACK_BIAS + L6_OFFSET], %l6
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    ldx [%sp + STACK_BIAS + L7_OFFSET], %l7
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    ldx [%sp + STACK_BIAS + L7_OFFSET], %l7
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    ldx [%sp + STACK_BIAS + I0_OFFSET], %i0
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    ldx [%sp + STACK_BIAS + I0_OFFSET], %i0
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    ldx [%sp + STACK_BIAS + I1_OFFSET], %i1
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    ldx [%sp + STACK_BIAS + I1_OFFSET], %i1
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    ldx [%sp + STACK_BIAS + I2_OFFSET], %i2
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    ldx [%sp + STACK_BIAS + I2_OFFSET], %i2
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    ldx [%sp + STACK_BIAS + I3_OFFSET], %i3
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    ldx [%sp + STACK_BIAS + I3_OFFSET], %i3
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    ldx [%sp + STACK_BIAS + I4_OFFSET], %i4
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    ldx [%sp + STACK_BIAS + I4_OFFSET], %i4
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    ldx [%sp + STACK_BIAS + I5_OFFSET], %i5
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    ldx [%sp + STACK_BIAS + I5_OFFSET], %i5
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    ldx [%sp + STACK_BIAS + I6_OFFSET], %i6
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    ldx [%sp + STACK_BIAS + I6_OFFSET], %i6
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    ldx [%sp + STACK_BIAS + I7_OFFSET], %i7
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    ldx [%sp + STACK_BIAS + I7_OFFSET], %i7
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    restored
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    restored
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    retry
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    retry
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.endm
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.endm
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.macro CLEAN_WINDOW_HANDLER
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.macro CLEAN_WINDOW_HANDLER
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    rdpr %cleanwin, %l0
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    rdpr %cleanwin, %l0
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    add %l0, 1, %l0
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    add %l0, 1, %l0
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    wrpr %l0, 0, %cleanwin
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    wrpr %l0, 0, %cleanwin
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    mov %r0, %l0
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    mov %r0, %l0
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    mov %r0, %l1
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    mov %r0, %l1
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    mov %r0, %l2
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    mov %r0, %l2
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    mov %r0, %l3
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    mov %r0, %l3
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    mov %r0, %l4
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    mov %r0, %l4
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    mov %r0, %l5
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    mov %r0, %l5
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    mov %r0, %l6
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    mov %r0, %l6
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    mov %r0, %l7
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    mov %r0, %l7
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    mov %r0, %o0
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    mov %r0, %o0
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    mov %r0, %o1
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    mov %r0, %o1
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    mov %r0, %o2
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    mov %r0, %o2
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    mov %r0, %o3
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    mov %r0, %o3
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    mov %r0, %o4
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    mov %r0, %o4
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    mov %r0, %o5
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    mov %r0, %o5
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    mov %r0, %o6
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    mov %r0, %o6
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    mov %r0, %o7
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    mov %r0, %o7
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    retry
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    retry
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.endm
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.endm
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#endif /* __ASM__ */
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#endif /* __ASM__ */
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#endif
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#endif
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 /** @}
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/** @}
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 */
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 */
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