Subversion Repositories HelenOS-historic

Rev

Rev 1780 | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 1780 Rev 1784
1
/*
1
/*
2
 * Copyright (C) 2005 Jakub Jermar
2
 * Copyright (C) 2005 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
 /** @addtogroup sparc64   
29
/** @addtogroup sparc64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#ifndef __sparc64_REGISTER_H__
35
#ifndef KERN_sparc64_REGISTER_H_
36
#define __sparc64_REGISTER_H__
36
#define KERN_sparc64_REGISTER_H_
-
 
37
 
-
 
38
#ifdef __ASM__
-
 
39
#define PSTATE_IE_BIT   2
-
 
40
#define PSTATE_AM_BIT   8
-
 
41
#else
37
 
42
 
38
#include <arch/types.h>
43
#include <arch/types.h>
39
 
44
 
40
/** Version Register. */
45
/** Version Register. */
41
union ver_reg {
46
union ver_reg {
42
    uint64_t value;
47
    uint64_t value;
43
    struct {
48
    struct {
44
        uint16_t manuf; /**< Manufacturer code. */
49
        uint16_t manuf; /**< Manufacturer code. */
45
        uint16_t impl;  /**< Implementation code. */
50
        uint16_t impl;  /**< Implementation code. */
46
        uint8_t mask;   /**< Mask set revision. */
51
        uint8_t mask;   /**< Mask set revision. */
47
        unsigned : 8;
52
        unsigned : 8;
48
        uint8_t maxtl;
53
        uint8_t maxtl;
49
        unsigned : 3;
54
        unsigned : 3;
50
        unsigned maxwin : 5;
55
        unsigned maxwin : 5;
51
    } __attribute__ ((packed));
56
    } __attribute__ ((packed));
52
};
57
};
53
typedef union ver_reg ver_reg_t;
58
typedef union ver_reg ver_reg_t;
54
 
59
 
55
/** Processor State Register. */
60
/** Processor State Register. */
56
union pstate_reg {
61
union pstate_reg {
57
    uint64_t value;
62
    uint64_t value;
58
    struct {
63
    struct {
59
        uint64_t : 52;
64
        uint64_t : 52;
60
        unsigned ig : 1;    /**< Interrupt Globals. */
65
        unsigned ig : 1;    /**< Interrupt Globals. */
61
        unsigned mg : 1;    /**< MMU Globals. */
66
        unsigned mg : 1;    /**< MMU Globals. */
62
        unsigned cle : 1;   /**< Current Little Endian. */
67
        unsigned cle : 1;   /**< Current Little Endian. */
63
        unsigned tle : 1;   /**< Trap Little Endian. */
68
        unsigned tle : 1;   /**< Trap Little Endian. */
64
        unsigned mm : 2;    /**< Memory Model. */
69
        unsigned mm : 2;    /**< Memory Model. */
65
        unsigned red : 1;   /**< RED state. */
70
        unsigned red : 1;   /**< RED state. */
66
        unsigned pef : 1;   /**< Enable floating-point. */
71
        unsigned pef : 1;   /**< Enable floating-point. */
67
        unsigned am : 1;    /**< 32-bit Address Mask. */
72
        unsigned am : 1;    /**< 32-bit Address Mask. */
68
        unsigned priv : 1;  /**< Privileged Mode. */
73
        unsigned priv : 1;  /**< Privileged Mode. */
69
        unsigned ie : 1;    /**< Interrupt Enable. */
74
        unsigned ie : 1;    /**< Interrupt Enable. */
70
        unsigned ag : 1;    /**< Alternate Globals*/
75
        unsigned ag : 1;    /**< Alternate Globals*/
71
    } __attribute__ ((packed));
76
    } __attribute__ ((packed));
72
};
77
};
73
typedef union pstate_reg pstate_reg_t;
78
typedef union pstate_reg pstate_reg_t;
74
 
79
 
75
/** TICK Register. */
80
/** TICK Register. */
76
union tick_reg {
81
union tick_reg {
77
    uint64_t value;
82
    uint64_t value;
78
    struct {
83
    struct {
79
        unsigned npt : 1;   /**< Non-privileged Trap enable. */
84
        unsigned npt : 1;   /**< Non-privileged Trap enable. */
80
        uint64_t counter : 63;  /**< Elapsed CPU clck cycle counter. */
85
        uint64_t counter : 63;  /**< Elapsed CPU clck cycle counter. */
81
    } __attribute__ ((packed));
86
    } __attribute__ ((packed));
82
};
87
};
83
typedef union tick_reg tick_reg_t;
88
typedef union tick_reg tick_reg_t;
84
 
89
 
85
/** TICK_compare Register. */
90
/** TICK_compare Register. */
86
union tick_compare_reg {
91
union tick_compare_reg {
87
    uint64_t value;
92
    uint64_t value;
88
    struct {
93
    struct {
89
        unsigned int_dis : 1;   /**< TICK_INT interrupt disabled flag. */
94
        unsigned int_dis : 1;   /**< TICK_INT interrupt disabled flag. */
90
        uint64_t tick_cmpr : 63;    /**< Compare value for TICK interrupts. */
95
        uint64_t tick_cmpr : 63;    /**< Compare value for TICK interrupts. */
91
    } __attribute__ ((packed));
96
    } __attribute__ ((packed));
92
};
97
};
93
typedef union tick_compare_reg tick_compare_reg_t;
98
typedef union tick_compare_reg tick_compare_reg_t;
94
 
99
 
95
/** SOFTINT Register. */
100
/** SOFTINT Register. */
96
union softint_reg {
101
union softint_reg {
97
    uint64_t value;
102
    uint64_t value;
98
    struct {
103
    struct {
99
        uint64_t : 47;
104
        uint64_t : 47;
100
        unsigned stick_int : 1;
105
        unsigned stick_int : 1;
101
        unsigned int_level : 15;
106
        unsigned int_level : 15;
102
        unsigned tick_int : 1;
107
        unsigned tick_int : 1;
103
    } __attribute__ ((packed));
108
    } __attribute__ ((packed));
104
};
109
};
105
typedef union softint_reg softint_reg_t;
110
typedef union softint_reg softint_reg_t;
106
 
111
 
107
#endif
112
#endif
108
 
113
 
109
 /** @}
114
#endif
110
 */
-
 
111
 
115
 
-
 
116
/** @}
-
 
117
 */
112
 
118