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#ifndef __sparc64_TLB_H__
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#ifndef __sparc64_TLB_H__
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#define __sparc64_TLB_H__
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#define __sparc64_TLB_H__
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#include <arch/mm/tte.h>
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#include <arch/mm/tte.h>
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#include <arch/mm/page.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <arch/barrier.h>
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#include <arch/barrier.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <typedefs.h>
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/** I-/D-TLB Tag Read Register. */
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/** I-/D-TLB Tag Read Register. */
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union tlb_tag_read_reg {
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union tlb_tag_read_reg {
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    __u64 value;
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    __u64 value;
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    struct {
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    struct {
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        __u64 va : 51;      /**< Virtual Address. */
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        __u64 vpn : 51;     /**< Virtual Address bits 63:13. */
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        unsigned context : 13;  /**< Context identifier. */
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        unsigned context : 13;  /**< Context identifier. */
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    } __attribute__ ((packed));
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    } __attribute__ ((packed));
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};
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};
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typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
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typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
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typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
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typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
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/** TLB Demap Operation types. */
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#define TLB_DEMAP_PAGE      0
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#define TLB_DEMAP_CONTEXT   1
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/** TLB Demap Operation Context register encodings. */
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#define TLB_DEMAP_PRIMARY   0
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#define TLB_DEMAP_SECONDARY 1
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#define TLB_DEMAP_NUCLEUS   2
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/** TLB Demap Operation Address. */
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union tlb_demap_addr {
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    __u64 value;
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    struct {
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        __u64 vpn: 51;      /**< Virtual Address bits 63:13. */
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        unsigned : 6;       /**< Ignored. */
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        unsigned type : 1;  /**< The type of demap operation. */
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        unsigned context : 2;   /**< Context register selection. */
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        unsigned : 4;       /**< Zero. */
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    } __attribute__ ((packed));
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};
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typedef union tlb_demap_addr tlb_demap_addr_t;
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/** Read IMMU TLB Data Access Register.
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/** Read IMMU TLB Data Access Register.
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 *
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 *
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 * @param entry TLB Entry index.
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 * @param entry TLB Entry index.
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 *
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 *
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 * @return Current value of specified IMMU TLB Data Access Register.
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 * @return Current value of specified IMMU TLB Data Access Register.
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    reg.value = 0;
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    reg.value = 0;
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    reg.tlb_entry = entry;
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    reg.tlb_entry = entry;
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    return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
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    return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
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}
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}
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/** Write IMMU TLB Data Access Register.
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 *
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 * @param entry TLB Entry index.
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 * @param value Value to be written.
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 */
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static inline __u64 itlb_data_access_write(index_t entry, __u64 value)
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{
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    tlb_data_access_addr_t reg;
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    reg.value = 0;
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    reg.tlb_entry = entry;
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    asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value);
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    flush();
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}
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/** Read DMMU TLB Data Access Register.
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/** Read DMMU TLB Data Access Register.
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 *
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 *
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 * @param entry TLB Entry index.
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 * @param entry TLB Entry index.
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 *
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 *
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 * @return Current value of specified DMMU TLB Data Access Register.
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 * @return Current value of specified DMMU TLB Data Access Register.
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    reg.value = 0;
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    reg.value = 0;
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    reg.tlb_entry = entry;
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    reg.tlb_entry = entry;
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    return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
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    return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
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}
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}
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/** Write DMMU TLB Data Access Register.
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 *
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 * @param entry TLB Entry index.
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 * @param value Value to be written.
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 */
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static inline __u64 dtlb_data_access_write(index_t entry, __u64 value)
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{
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    tlb_data_access_addr_t reg;
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    reg.value = 0;
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    reg.tlb_entry = entry;
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    asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value);
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    flush();
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}
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/** Read IMMU TLB Tag Read Register.
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/** Read IMMU TLB Tag Read Register.
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 *
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 *
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 * @param entry TLB Entry index.
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 * @param entry TLB Entry index.
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 *
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 *
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 * @return Current value of specified IMMU TLB Tag Read Register.
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 * @return Current value of specified IMMU TLB Tag Read Register.
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{
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{
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    asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
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    asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
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    flush();
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    flush();
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}
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}
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/** Perform IMMU TLB Demap Operation.
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 *
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 * @param type Selects between context and page demap.
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 * @param context_encoding Specifies which Context register has Context ID for demap.
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 * @param page Address which is on the page to be demapped.
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 */
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static inline void itlb_demap(int type, int context_encoding, __address page)
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{
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    tlb_demap_addr_t da;
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    page_address_t pg;
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    da.value = 0;
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    pg.address = page;
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    da.type = type;
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    da.context = context_encoding;
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    da.vpn = pg.vpn;
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    asi_u64_write(ASI_IMMU_DEMAP, da.value, 0);
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    flush();
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}
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/** Perform DMMU TLB Demap Operation.
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 *
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 * @param type Selects between context and page demap.
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 * @param context_encoding Specifies which Context register has Context ID for demap.
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 * @param page Address which is on the page to be demapped.
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 */
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static inline void dtlb_demap(int type, int context_encoding, __address page)
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{
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    tlb_demap_addr_t da;
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    page_address_t pg;
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    da.value = 0;
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    pg.address = page;
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    da.type = type;
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    da.context = context_encoding;
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    da.vpn = pg.vpn;
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    asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
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    flush();
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}
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#endif
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#endif