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#ifndef __sparc64_TLB_H__
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#ifndef __sparc64_TLB_H__
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#define __sparc64_TLB_H__
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#define __sparc64_TLB_H__
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#include <arch/mm/tte.h>
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#include <arch/mm/tte.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <arch/barrier.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <typedefs.h>
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#define ITLB_ENTRY_COUNT        64
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#define ITLB_ENTRY_COUNT        64
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#define DTLB_ENTRY_COUNT        64
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#define DTLB_ENTRY_COUNT        64
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        __u64 va : 51;      /**< Virtual Address. */
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        __u64 va : 51;      /**< Virtual Address. */
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        unsigned context : 13;  /**< Context identifier. */
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        unsigned context : 13;  /**< Context identifier. */
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    } __attribute__ ((packed));
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    } __attribute__ ((packed));
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};
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};
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typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
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typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
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typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
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/** Read IMMU TLB Data Access Register.
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/** Read IMMU TLB Data Access Register.
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 *
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 *
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 * @param entry TLB Entry index.
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 * @param entry TLB Entry index.
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 *
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 *
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 *
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 *
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 * @param entry TLB Entry index.
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 * @param entry TLB Entry index.
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 *
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 *
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 * @return Current value of specified IMMU TLB Tag Read Register.
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 * @return Current value of specified IMMU TLB Tag Read Register.
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 */
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 */
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static inline __u64 itlb_tag_read(index_t entry)
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static inline __u64 itlb_tag_read_read(index_t entry)
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{
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{
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    tlb_tag_read_addr_t tag;
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    tlb_tag_read_addr_t tag;
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    tag.value = 0;
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    tag.value = 0;
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    tag.tlb_entry = entry;
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    tag.tlb_entry = entry;
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 *
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 *
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 * @param entry TLB Entry index.
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 * @param entry TLB Entry index.
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 *
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 *
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 * @return Current value of specified DMMU TLB Tag Read Register.
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 * @return Current value of specified DMMU TLB Tag Read Register.
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 */
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 */
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static inline __u64 dtlb_tag_read(index_t entry)
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static inline __u64 dtlb_tag_read_read(index_t entry)
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{
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{
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    tlb_tag_read_addr_t tag;
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    tlb_tag_read_addr_t tag;
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    tag.value = 0;
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    tag.value = 0;
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    tag.tlb_entry = entry;
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    tag.tlb_entry = entry;
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    return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
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    return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
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}
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}
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/** Write IMMU TLB Tag Access Register.
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 *
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 * @param v Value to be written.
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 */
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static inline void itlb_tag_access_write(__u64 v)
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{
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    asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v);
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    flush();
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}
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/** Write DMMU TLB Tag Access Register.
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 *
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 * @param v Value to be written.
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 */
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static inline void dtlb_tag_access_write(__u64 v)
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{
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    asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v);
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    flush();
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}
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/** Write IMMU TLB Data in Register.
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 *
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 * @param v Value to be written.
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 */
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static inline void itlb_data_in_write(__u64 v)
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{
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    asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v);
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    flush();
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}
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/** Write DMMU TLB Data in Register.
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 *
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 * @param v Value to be written.
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 */
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static inline void dtlb_data_in_write(__u64 v)
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{
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    asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
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    flush();
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}
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#endif
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#endif