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| 45 | /* |
45 | /* |
| 46 | * The FLUSH instruction takes address parameter. |
46 | * The FLUSH instruction takes address parameter. |
| 47 | * As such, it may trap if the address is not found in DTLB. |
47 | * As such, it may trap if the address is not found in DTLB. |
| 48 | * However, JPS1 implementations are free to ignore the trap. |
48 | * However, JPS1 implementations are free to ignore the trap. |
| 49 | */ |
49 | */ |
| - | 50 | ||
| - | 51 | /* |
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| - | 52 | * %i7 should provide address that is always mapped in DTLB |
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| - | 53 | * as it is a pointer to kernel code. |
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| - | 54 | */ |
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| 50 | __asm__ volatile ("flush %sp\n"); |
55 | __asm__ volatile ("flush %i7\n"); |
| 51 | } |
56 | } |
| 52 | 57 | ||
| 53 | /** Memory Barrier instruction. */ |
58 | /** Memory Barrier instruction. */ |
| 54 | static inline void membar(void) |
59 | static inline void membar(void) |
| 55 | { |
60 | { |