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/*
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/*
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 * Copyright (C) 2006 Martin Decky
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 * Copyright (C) 2006 Martin Decky
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#include <arch/mm/tlb.h>
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#include <arch/mm/tlb.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <mm/tlb.h>
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#include <mm/tlb.h>
-
 
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#include <mm/frame.h>
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#include <mm/page.h>
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#include <mm/page.h>
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#include <mm/as.h>
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#include <mm/as.h>
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#include <arch.h>
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#include <arch.h>
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#include <print.h>
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#include <print.h>
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#include <symtab.h>
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#include <symtab.h>
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38
 
39
 
-
 
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static phte_t *phte;
-
 
41
 
-
 
42
 
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/** Initialize Page Hash Table.
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/** Initialize Page Hash Table.
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 *
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 *
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 * Setup the Page Hash Table with no entries.
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 * Setup the Page Hash Table with no entries.
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 *
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 *
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 */
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 */
44
void tlb_arch_init(void)
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void tlb_arch_init(void)
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{
49
{
-
 
50
    phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC));
-
 
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    phte =(phte_t *) PA2KA((__address) physical_phte);
-
 
52
   
-
 
53
    ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0);
-
 
54
   
-
 
55
    memsetb((__address) phte, 1 << PHT_BITS, 0);
-
 
56
   
-
 
57
    asm volatile (
-
 
58
        "mtsdr1 %0\n"
-
 
59
        :
-
 
60
        : "r" ((__address) physical_phte)
-
 
61
    );
46
}
62
}
47
 
63
 
48
 
64
 
49
/** Try to find PTE for faulting address
65
/** Try to find PTE for faulting address
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 *
66
 *
51
 * Try to find PTE for faulting address.
67
 * Try to find PTE for faulting address.
52
 * The AS->lock must be held on entry to this function.
68
 * The AS->lock must be held on entry to this function.
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 *
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 *
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 * @param badvaddr Faulting virtual address.
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 * @param badvaddr Faulting virtual address.
55
 * @return         PTE on success, NULL otherwise.
71
 * @return         PTE on success, NULL otherwise.
56
 *
72
 *
57
 */
73
 */
58
static pte_t *find_mapping_and_check(__address badvaddr)
74
static pte_t *find_mapping_and_check(__address badvaddr)
59
{
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{
60
    /*
76
    /*
61
     * Check if the mapping exists in page tables.
77
     * Check if the mapping exists in page tables.
62
     */
78
     */
63
    pte_t *pte = page_mapping_find(AS, badvaddr);
79
    pte_t *pte = page_mapping_find(AS, badvaddr);
64
    if ((pte) && (pte->p)) {
80
    if ((pte) && (pte->p)) {
65
        /*
81
        /*
66
         * Mapping found in page tables.
82
         * Mapping found in page tables.
67
         * Immediately succeed.
83
         * Immediately succeed.
68
         */
84
         */
69
        return pte;
85
        return pte;
70
    } else {
86
    } else {
71
        /*
87
        /*
72
         * Mapping not found in page tables.
88
         * Mapping not found in page tables.
73
         * Resort to higher-level page fault handler.
89
         * Resort to higher-level page fault handler.
74
         */
90
         */
75
        page_table_unlock(AS, true);
91
        page_table_unlock(AS, true);
76
        if (as_page_fault(badvaddr)) {
92
        if (as_page_fault(badvaddr)) {
77
            /*
93
            /*
78
             * The higher-level page fault handler succeeded,
94
             * The higher-level page fault handler succeeded,
79
             * The mapping ought to be in place.
95
             * The mapping ought to be in place.
80
             */
96
             */
81
            page_table_lock(AS, true);
97
            page_table_lock(AS, true);
82
            pte = page_mapping_find(AS, badvaddr);
98
            pte = page_mapping_find(AS, badvaddr);
83
            ASSERT((pte) && (pte->p));
99
            ASSERT((pte) && (pte->p));
84
            return pte;
100
            return pte;
85
        } else {
101
        } else {
86
            page_table_lock(AS, true);
102
            page_table_lock(AS, true);
87
            printf("Page fault.\n");
103
            printf("Page fault.\n");
88
            return NULL;
104
            return NULL;
89
        }
105
        }
90
       
106
       
91
    }
107
    }
92
}
108
}
93
 
109
 
94
 
110
 
95
static void pht_refill_fail(__address badvaddr, istate_t *istate)
111
static void pht_refill_fail(__address badvaddr, istate_t *istate)
96
{
112
{
97
    char *symbol = "";
113
    char *symbol = "";
98
    char *sym2 = "";
114
    char *sym2 = "";
99
 
115
 
100
    char *s = get_symtab_entry(istate->pc);
116
    char *s = get_symtab_entry(istate->pc);
101
    if (s)
117
    if (s)
102
        symbol = s;
118
        symbol = s;
103
    s = get_symtab_entry(istate->lr);
119
    s = get_symtab_entry(istate->lr);
104
    if (s)
120
    if (s)
105
        sym2 = s;
121
        sym2 = s;
106
    panic("%X: PHT Refill Exception at %X(%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
122
    panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
107
}
123
}
108
 
124
 
109
 
125
 
110
/** Process Data Storage Interrupt
126
/** Process Instruction/Data Storage Interrupt
111
 *
127
 *
-
 
128
 * @param data   True if Data Storage Interrupt.
112
 * @param istate Interrupted register context.
129
 * @param istate Interrupted register context.
113
 *
130
 *
114
 */
131
 */
115
void pht_refill(istate_t *istate)
132
void pht_refill(bool data, istate_t *istate)
116
{
133
{
117
    asid_t asid;
134
    asid_t asid;
118
    __address badvaddr;
135
    __address badvaddr;
119
    pte_t *pte;
136
    pte_t *pte;
-
 
137
    __u32 page;
-
 
138
    __u32 api;
-
 
139
    __u32 vsid;
-
 
140
    __u32 hash;
-
 
141
    __u32 i;
120
   
142
   
-
 
143
    if (data) {
121
    __asm__ volatile (
144
        asm volatile (
122
        "mfdar %0\n"
145
            "mfdar %0\n"
123
        : "=r" (badvaddr)
146
            : "=r" (badvaddr)
124
    );
147
        );
-
 
148
    } else
-
 
149
        badvaddr = istate->pc;
125
   
150
       
126
    spinlock_lock(&AS->lock);
151
    spinlock_lock(&AS->lock);
127
    asid = AS->asid;
152
    asid = AS->asid;
128
    spinlock_unlock(&AS->lock);
153
    spinlock_unlock(&AS->lock);
129
   
154
   
130
    page_table_lock(AS, true);
155
    page_table_lock(AS, true);
131
   
156
   
132
    pte = find_mapping_and_check(badvaddr);
157
    pte = find_mapping_and_check(badvaddr);
133
    if (!pte)
158
    if (!pte)
134
        goto fail;
159
        goto fail;
135
 
160
 
136
    /*
-
 
137
     * Record access to PTE.
161
    /* Record access to PTE */
138
     */
-
 
139
    pte->a = 1;
162
    pte->a = 1;
140
   
163
   
-
 
164
    page = ADDR2PFN(badvaddr);
-
 
165
    api = (badvaddr >> 22) & 0x3f;
-
 
166
    asm volatile (
-
 
167
        "mfsrin %0, %1\n"
-
 
168
        : "=r" (vsid)
-
 
169
        : "r" (badvaddr >> 28)
-
 
170
    );
-
 
171
   
-
 
172
    /* Primary hash (xor) */
-
 
173
    hash = ((vsid ^ page) & 0x3ff) << 3;
-
 
174
   
141
    // FIXME: Insert entry into PHT
175
    /* Find invalid PTE in PTEG */
-
 
176
    for (i = 0; i < 8; i++) {
-
 
177
        if (!phte[hash + i].v)
-
 
178
            break;
-
 
179
    }
-
 
180
   
-
 
181
    // TODO: Check access/change bits, secondary hash
-
 
182
   
-
 
183
    if (i == 8)
-
 
184
        i = page % 8;
-
 
185
   
-
 
186
    phte[hash + i].v = 1;
-
 
187
    phte[hash + i].vsid = vsid;
-
 
188
    phte[hash + i].h = 0;
-
 
189
    phte[hash + i].api = api;
-
 
190
    phte[hash + i].rpn = pte->pfn;
-
 
191
    phte[hash + i].r = 0;
-
 
192
    phte[hash + i].c = 0;
-
 
193
    phte[hash + i].pp = 2; // FIXME
142
 
194
   
143
    page_table_unlock(AS, true);
195
    page_table_unlock(AS, true);
144
    return;
196
    return;
145
   
197
   
146
fail:
198
fail:
147
    page_table_unlock(AS, true);
199
    page_table_unlock(AS, true);
148
    pht_refill_fail(badvaddr, istate);
200
    pht_refill_fail(badvaddr, istate);
149
}
201
}
150
 
202
 
151
 
203
 
152
/** Print contents of Page Hash Table. */
204
/** Print contents of Page Hash Table. */
153
void tlb_print(void)
205
void tlb_print(void)
154
{
206
{
155
}
207
}
156
 
208