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Line 46... Line 46...
46
#include <align.h>
46
#include <align.h>
47
#include <config.h>
47
#include <config.h>
48
#include <print.h>
48
#include <print.h>
49
#include <symtab.h>
49
#include <symtab.h>
50
 
50
 
51
static phte_t *phte;
-
 
52
 
-
 
53
 
51
 
54
/** Try to find PTE for faulting address
52
/** Try to find PTE for faulting address
55
 *
53
 *
56
 * Try to find PTE for faulting address.
54
 * Try to find PTE for faulting address.
57
 * The as->lock must be held on entry to this function
55
 * The as->lock must be held on entry to this function
Line 64... Line 62...
64
 * @param istate   Pointer to interrupted state.
62
 * @param istate   Pointer to interrupted state.
65
 * @param pfrc     Pointer to variable where as_page_fault() return code will be stored.
63
 * @param pfrc     Pointer to variable where as_page_fault() return code will be stored.
66
 * @return         PTE on success, NULL otherwise.
64
 * @return         PTE on success, NULL otherwise.
67
 *
65
 *
68
 */
66
 */
69
static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access,
67
static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access, istate_t *istate, int *pfrc)
70
                     istate_t *istate, int *pfrc)
-
 
71
{
68
{
72
    /*
69
    /*
73
     * Check if the mapping exists in page tables.
70
     * Check if the mapping exists in page tables.
74
     */
71
     */
75
    pte_t *pte = page_mapping_find(as, badvaddr);
72
    pte_t *pte = page_mapping_find(as, badvaddr);
Line 130... Line 127...
130
 
127
 
131
static void pht_insert(const __address vaddr, const pfn_t pfn)
128
static void pht_insert(const __address vaddr, const pfn_t pfn)
132
{
129
{
133
    __u32 page = (vaddr >> 12) & 0xffff;
130
    __u32 page = (vaddr >> 12) & 0xffff;
134
    __u32 api = (vaddr >> 22) & 0x3f;
131
    __u32 api = (vaddr >> 22) & 0x3f;
135
    __u32 vsid;
-
 
136
   
132
   
-
 
133
    __u32 vsid;
137
    asm volatile (
134
    asm volatile (
138
        "mfsrin %0, %1\n"
135
        "mfsrin %0, %1\n"
139
        : "=r" (vsid)
136
        : "=r" (vsid)
140
        : "r" (vaddr)
137
        : "r" (vaddr)
141
    );
138
    );
142
   
139
   
-
 
140
    __u32 sdr1;
-
 
141
    asm volatile (
-
 
142
        "mfsdr1 %0\n"
-
 
143
        : "=r" (sdr1)
-
 
144
    );
-
 
145
    phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
-
 
146
   
143
    /* Primary hash (xor) */
147
    /* Primary hash (xor) */
144
    __u32 h = 0;
148
    __u32 h = 0;
145
    __u32 hash = vsid ^ page;
149
    __u32 hash = vsid ^ page;
146
    __u32 base = (hash & 0x3ff) << 3;
150
    __u32 base = (hash & 0x3ff) << 3;
147
    __u32 i;
151
    __u32 i;
Line 186... Line 190...
186
    phte[base + i].c = 0;
190
    phte[base + i].c = 0;
187
    phte[base + i].pp = 2; // FIXME
191
    phte[base + i].pp = 2; // FIXME
188
}
192
}
189
 
193
 
190
 
194
 
-
 
195
static void pht_real_insert(const __address vaddr, const pfn_t pfn)
-
 
196
{
-
 
197
    __u32 page = (vaddr >> 12) & 0xffff;
-
 
198
    __u32 api = (vaddr >> 22) & 0x3f;
-
 
199
   
-
 
200
    __u32 vsid;
-
 
201
    asm volatile (
-
 
202
        "mfsrin %0, %1\n"
-
 
203
        : "=r" (vsid)
-
 
204
        : "r" (vaddr)
-
 
205
    );
-
 
206
   
-
 
207
    __u32 sdr1;
-
 
208
    asm volatile (
-
 
209
        "mfsdr1 %0\n"
-
 
210
        : "=r" (sdr1)
-
 
211
    );
-
 
212
    phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000);
-
 
213
   
-
 
214
    /* Primary hash (xor) */
-
 
215
    __u32 h = 0;
-
 
216
    __u32 hash = vsid ^ page;
-
 
217
    __u32 base = (hash & 0x3ff) << 3;
-
 
218
    __u32 i;
-
 
219
    bool found = false;
-
 
220
   
-
 
221
    /* Find unused or colliding
-
 
222
       PTE in PTEG */
-
 
223
    for (i = 0; i < 8; i++) {
-
 
224
        if ((!phte_physical[base + i].v) || ((phte_physical[base + i].vsid == vsid) && (phte_physical[base + i].api == api))) {
-
 
225
            found = true;
-
 
226
            break;
-
 
227
        }
-
 
228
    }
-
 
229
   
-
 
230
    if (!found) {
-
 
231
        /* Secondary hash (not) */
-
 
232
        __u32 base2 = (~hash & 0x3ff) << 3;
-
 
233
       
-
 
234
        /* Find unused or colliding
-
 
235
           PTE in PTEG */
-
 
236
        for (i = 0; i < 8; i++) {
-
 
237
            if ((!phte_physical[base2 + i].v) || ((phte_physical[base2 + i].vsid == vsid) && (phte_physical[base2 + i].api == api))) {
-
 
238
                found = true;
-
 
239
                base = base2;
-
 
240
                h = 1;
-
 
241
                break;
-
 
242
            }
-
 
243
        }
-
 
244
       
-
 
245
        if (!found) {
-
 
246
            // TODO: A/C precedence groups
-
 
247
            i = page % 8;
-
 
248
        }
-
 
249
    }
-
 
250
   
-
 
251
    phte_physical[base + i].v = 1;
-
 
252
    phte_physical[base + i].vsid = vsid;
-
 
253
    phte_physical[base + i].h = h;
-
 
254
    phte_physical[base + i].api = api;
-
 
255
    phte_physical[base + i].rpn = pfn;
-
 
256
    phte_physical[base + i].r = 0;
-
 
257
    phte_physical[base + i].c = 0;
-
 
258
    phte_physical[base + i].pp = 2; // FIXME
-
 
259
}
-
 
260
 
-
 
261
 
191
/** Process Instruction/Data Storage Interrupt
262
/** Process Instruction/Data Storage Interrupt
192
 *
263
 *
193
 * @param n Interrupt vector number.
264
 * @param n Interrupt vector number.
194
 * @param istate Interrupted register context.
265
 * @param istate Interrupted register context.
195
 *
266
 *
Line 248... Line 319...
248
    page_table_unlock(as, lock);
319
    page_table_unlock(as, lock);
249
    pht_refill_fail(badvaddr, istate);
320
    pht_refill_fail(badvaddr, istate);
250
}
321
}
251
 
322
 
252
 
323
 
-
 
324
/** Process Instruction/Data Storage Interrupt in Real Mode
-
 
325
 *
-
 
326
 * @param n Interrupt vector number.
-
 
327
 * @param istate Interrupted register context.
-
 
328
 *
-
 
329
 */
253
void pht_init(void)
330
bool pht_real_refill(int n, istate_t *istate)
254
{
331
{
255
    memsetb((__address) phte, 1 << PHT_BITS, 0);
332
    __address badvaddr;
256
}
-
 
257
 
333
   
-
 
334
    if (n == VECTOR_DATA_STORAGE) {
-
 
335
        asm volatile (
-
 
336
            "mfdar %0\n"
-
 
337
            : "=r" (badvaddr)
-
 
338
        );
-
 
339
    } else
-
 
340
        badvaddr = istate->pc;
258
 
341
   
-
 
342
    __u32 physmem;
-
 
343
    asm volatile (
-
 
344
        "mfsprg3 %0\n"
259
void page_arch_init(void)
345
        : "=r" (physmem)
-
 
346
    );
260
{
347
   
261
    if (config.cpu_active == 1) {
348
    if ((badvaddr >= PA2KA(0)) && (badvaddr <= PA2KA(physmem))) {
262
        page_mapping_operations = &pt_mapping_operations;
349
        pht_real_insert(badvaddr, KA2PA(badvaddr) >> 12);
-
 
350
        return true;
-
 
351
    }
263
       
352
   
264
        __address cur;
353
    return false;
265
        int flags;
354
}
266
       
355
 
267
        /* Frames below 128 MB are mapped using BAT,
-
 
268
           map rest of the physical memory */
-
 
269
        for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) {
-
 
270
            flags = PAGE_CACHEABLE;
-
 
271
            if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size))
-
 
272
                flags |= PAGE_GLOBAL;
-
 
273
            page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
-
 
274
        }
-
 
275
       
-
 
276
        /* Allocate page hash table */
-
 
277
        phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC));
-
 
278
        phte = (phte_t *) PA2KA((__address) physical_phte);
-
 
279
       
356
 
280
        ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0);
-
 
281
        pht_init();
357
void pht_init(void)
-
 
358
{
-
 
359
    // FIXME
282
       
360
   
-
 
361
    __u32 sdr1;
283
        asm volatile (
362
    asm volatile (
284
            "mtsdr1 %0\n"
363
        "mfsdr1 %0\n"
285
            :
-
 
286
            : "r" ((__address) physical_phte)
364
        : "=r" (sdr1)
287
        );
365
    );
-
 
366
    phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
-
 
367
   
-
 
368
    memsetb((__address) phte, 65536, 0);
288
    }
369
}
-
 
370
 
-
 
371
 
-
 
372
void page_arch_init(void)
-
 
373
{
-
 
374
    if (config.cpu_active == 1)
-
 
375
        page_mapping_operations = &pt_mapping_operations;
289
}
376
}
290
 
377
 
291
 
378
 
292
__address hw_map(__address physaddr, size_t size)
379
__address hw_map(__address physaddr, size_t size)
293
{
380
{
Line 304... Line 391...
304
    return virtaddr;
391
    return virtaddr;
305
}
392
}
306
 
393
 
307
 /** @}
394
/** @}
308
 */
395
 */
309
 
-