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1
/*
1
/*
2
 * Copyright (C) 2005 Martin Decky
2
 * Copyright (C) 2005 Martin Decky
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
 /** @addtogroup ppc32mm   
29
/** @addtogroup ppc32mm
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch/mm/page.h>
35
#include <arch/mm/page.h>
36
#include <genarch/mm/page_pt.h>
36
#include <genarch/mm/page_pt.h>
37
#include <arch/mm/frame.h>
37
#include <arch/mm/frame.h>
38
#include <arch/asm.h>
38
#include <arch/asm.h>
39
#include <arch/interrupt.h>
39
#include <arch/interrupt.h>
40
#include <mm/frame.h>
40
#include <mm/frame.h>
41
#include <mm/page.h>
41
#include <mm/page.h>
42
#include <mm/as.h>
42
#include <mm/as.h>
43
#include <arch.h>
43
#include <arch.h>
44
#include <arch/types.h>
44
#include <arch/types.h>
45
#include <arch/exception.h>
45
#include <arch/exception.h>
46
#include <align.h>
46
#include <align.h>
47
#include <config.h>
47
#include <config.h>
48
#include <print.h>
48
#include <print.h>
49
#include <symtab.h>
49
#include <symtab.h>
50
 
50
 
51
static phte_t *phte;
-
 
52
 
-
 
53
 
51
 
54
/** Try to find PTE for faulting address
52
/** Try to find PTE for faulting address
55
 *
53
 *
56
 * Try to find PTE for faulting address.
54
 * Try to find PTE for faulting address.
57
 * The as->lock must be held on entry to this function
55
 * The as->lock must be held on entry to this function
58
 * if lock is true.
56
 * if lock is true.
59
 *
57
 *
60
 * @param as       Address space.
58
 * @param as       Address space.
61
 * @param lock     Lock/unlock the address space.
59
 * @param lock     Lock/unlock the address space.
62
 * @param badvaddr Faulting virtual address.
60
 * @param badvaddr Faulting virtual address.
63
 * @param access   Access mode that caused the fault.
61
 * @param access   Access mode that caused the fault.
64
 * @param istate   Pointer to interrupted state.
62
 * @param istate   Pointer to interrupted state.
65
 * @param pfrc     Pointer to variable where as_page_fault() return code will be stored.
63
 * @param pfrc     Pointer to variable where as_page_fault() return code will be stored.
66
 * @return         PTE on success, NULL otherwise.
64
 * @return         PTE on success, NULL otherwise.
67
 *
65
 *
68
 */
66
 */
69
static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access,
67
static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access, istate_t *istate, int *pfrc)
70
                     istate_t *istate, int *pfrc)
-
 
71
{
68
{
72
    /*
69
    /*
73
     * Check if the mapping exists in page tables.
70
     * Check if the mapping exists in page tables.
74
     */
71
     */
75
    pte_t *pte = page_mapping_find(as, badvaddr);
72
    pte_t *pte = page_mapping_find(as, badvaddr);
76
    if ((pte) && (pte->p)) {
73
    if ((pte) && (pte->p)) {
77
        /*
74
        /*
78
         * Mapping found in page tables.
75
         * Mapping found in page tables.
79
         * Immediately succeed.
76
         * Immediately succeed.
80
         */
77
         */
81
        return pte;
78
        return pte;
82
    } else {
79
    } else {
83
        int rc;
80
        int rc;
84
   
81
   
85
        /*
82
        /*
86
         * Mapping not found in page tables.
83
         * Mapping not found in page tables.
87
         * Resort to higher-level page fault handler.
84
         * Resort to higher-level page fault handler.
88
         */
85
         */
89
        page_table_unlock(as, lock);
86
        page_table_unlock(as, lock);
90
        switch (rc = as_page_fault(badvaddr, access, istate)) {
87
        switch (rc = as_page_fault(badvaddr, access, istate)) {
91
            case AS_PF_OK:
88
            case AS_PF_OK:
92
                /*
89
                /*
93
                 * The higher-level page fault handler succeeded,
90
                 * The higher-level page fault handler succeeded,
94
                 * The mapping ought to be in place.
91
                 * The mapping ought to be in place.
95
                 */
92
                 */
96
                page_table_lock(as, lock);
93
                page_table_lock(as, lock);
97
                pte = page_mapping_find(as, badvaddr);
94
                pte = page_mapping_find(as, badvaddr);
98
                ASSERT((pte) && (pte->p));
95
                ASSERT((pte) && (pte->p));
99
                return pte;
96
                return pte;
100
            case AS_PF_DEFER:
97
            case AS_PF_DEFER:
101
                page_table_lock(as, lock);
98
                page_table_lock(as, lock);
102
                *pfrc = rc;
99
                *pfrc = rc;
103
                return NULL;
100
                return NULL;
104
            case AS_PF_FAULT:
101
            case AS_PF_FAULT:
105
                page_table_lock(as, lock);
102
                page_table_lock(as, lock);
106
                printf("Page fault.\n");
103
                printf("Page fault.\n");
107
                *pfrc = rc;
104
                *pfrc = rc;
108
                return NULL;
105
                return NULL;
109
            default:
106
            default:
110
                panic("unexpected rc (%d)\n", rc);
107
                panic("unexpected rc (%d)\n", rc);
111
        }  
108
        }  
112
    }
109
    }
113
}
110
}
114
 
111
 
115
 
112
 
116
static void pht_refill_fail(__address badvaddr, istate_t *istate)
113
static void pht_refill_fail(__address badvaddr, istate_t *istate)
117
{
114
{
118
    char *symbol = "";
115
    char *symbol = "";
119
    char *sym2 = "";
116
    char *sym2 = "";
120
 
117
 
121
    char *s = get_symtab_entry(istate->pc);
118
    char *s = get_symtab_entry(istate->pc);
122
    if (s)
119
    if (s)
123
        symbol = s;
120
        symbol = s;
124
    s = get_symtab_entry(istate->lr);
121
    s = get_symtab_entry(istate->lr);
125
    if (s)
122
    if (s)
126
        sym2 = s;
123
        sym2 = s;
127
    panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
124
    panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
128
}
125
}
129
 
126
 
130
 
127
 
131
static void pht_insert(const __address vaddr, const pfn_t pfn)
128
static void pht_insert(const __address vaddr, const pfn_t pfn)
132
{
129
{
133
    __u32 page = (vaddr >> 12) & 0xffff;
130
    __u32 page = (vaddr >> 12) & 0xffff;
134
    __u32 api = (vaddr >> 22) & 0x3f;
131
    __u32 api = (vaddr >> 22) & 0x3f;
135
    __u32 vsid;
-
 
136
   
132
   
-
 
133
    __u32 vsid;
137
    asm volatile (
134
    asm volatile (
138
        "mfsrin %0, %1\n"
135
        "mfsrin %0, %1\n"
139
        : "=r" (vsid)
136
        : "=r" (vsid)
140
        : "r" (vaddr)
137
        : "r" (vaddr)
141
    );
138
    );
142
   
139
   
-
 
140
    __u32 sdr1;
-
 
141
    asm volatile (
-
 
142
        "mfsdr1 %0\n"
-
 
143
        : "=r" (sdr1)
-
 
144
    );
-
 
145
    phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
-
 
146
   
143
    /* Primary hash (xor) */
147
    /* Primary hash (xor) */
144
    __u32 h = 0;
148
    __u32 h = 0;
145
    __u32 hash = vsid ^ page;
149
    __u32 hash = vsid ^ page;
146
    __u32 base = (hash & 0x3ff) << 3;
150
    __u32 base = (hash & 0x3ff) << 3;
147
    __u32 i;
151
    __u32 i;
148
    bool found = false;
152
    bool found = false;
149
   
153
   
150
    /* Find unused or colliding
154
    /* Find unused or colliding
151
       PTE in PTEG */
155
       PTE in PTEG */
152
    for (i = 0; i < 8; i++) {
156
    for (i = 0; i < 8; i++) {
153
        if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) {
157
        if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) {
154
            found = true;
158
            found = true;
155
            break;
159
            break;
156
        }
160
        }
157
    }
161
    }
158
   
162
   
159
    if (!found) {
163
    if (!found) {
160
        /* Secondary hash (not) */
164
        /* Secondary hash (not) */
161
        __u32 base2 = (~hash & 0x3ff) << 3;
165
        __u32 base2 = (~hash & 0x3ff) << 3;
162
       
166
       
163
        /* Find unused or colliding
167
        /* Find unused or colliding
164
           PTE in PTEG */
168
           PTE in PTEG */
165
        for (i = 0; i < 8; i++) {
169
        for (i = 0; i < 8; i++) {
166
            if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) {
170
            if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) {
167
                found = true;
171
                found = true;
168
                base = base2;
172
                base = base2;
169
                h = 1;
173
                h = 1;
170
                break;
174
                break;
171
            }
175
            }
172
        }
176
        }
173
       
177
       
174
        if (!found) {
178
        if (!found) {
175
            // TODO: A/C precedence groups
179
            // TODO: A/C precedence groups
176
            i = page % 8;
180
            i = page % 8;
177
        }
181
        }
178
    }
182
    }
179
   
183
   
180
    phte[base + i].v = 1;
184
    phte[base + i].v = 1;
181
    phte[base + i].vsid = vsid;
185
    phte[base + i].vsid = vsid;
182
    phte[base + i].h = h;
186
    phte[base + i].h = h;
183
    phte[base + i].api = api;
187
    phte[base + i].api = api;
184
    phte[base + i].rpn = pfn;
188
    phte[base + i].rpn = pfn;
185
    phte[base + i].r = 0;
189
    phte[base + i].r = 0;
186
    phte[base + i].c = 0;
190
    phte[base + i].c = 0;
187
    phte[base + i].pp = 2; // FIXME
191
    phte[base + i].pp = 2; // FIXME
188
}
192
}
189
 
193
 
190
 
194
 
-
 
195
static void pht_real_insert(const __address vaddr, const pfn_t pfn)
-
 
196
{
-
 
197
    __u32 page = (vaddr >> 12) & 0xffff;
-
 
198
    __u32 api = (vaddr >> 22) & 0x3f;
-
 
199
   
-
 
200
    __u32 vsid;
-
 
201
    asm volatile (
-
 
202
        "mfsrin %0, %1\n"
-
 
203
        : "=r" (vsid)
-
 
204
        : "r" (vaddr)
-
 
205
    );
-
 
206
   
-
 
207
    __u32 sdr1;
-
 
208
    asm volatile (
-
 
209
        "mfsdr1 %0\n"
-
 
210
        : "=r" (sdr1)
-
 
211
    );
-
 
212
    phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000);
-
 
213
   
-
 
214
    /* Primary hash (xor) */
-
 
215
    __u32 h = 0;
-
 
216
    __u32 hash = vsid ^ page;
-
 
217
    __u32 base = (hash & 0x3ff) << 3;
-
 
218
    __u32 i;
-
 
219
    bool found = false;
-
 
220
   
-
 
221
    /* Find unused or colliding
-
 
222
       PTE in PTEG */
-
 
223
    for (i = 0; i < 8; i++) {
-
 
224
        if ((!phte_physical[base + i].v) || ((phte_physical[base + i].vsid == vsid) && (phte_physical[base + i].api == api))) {
-
 
225
            found = true;
-
 
226
            break;
-
 
227
        }
-
 
228
    }
-
 
229
   
-
 
230
    if (!found) {
-
 
231
        /* Secondary hash (not) */
-
 
232
        __u32 base2 = (~hash & 0x3ff) << 3;
-
 
233
       
-
 
234
        /* Find unused or colliding
-
 
235
           PTE in PTEG */
-
 
236
        for (i = 0; i < 8; i++) {
-
 
237
            if ((!phte_physical[base2 + i].v) || ((phte_physical[base2 + i].vsid == vsid) && (phte_physical[base2 + i].api == api))) {
-
 
238
                found = true;
-
 
239
                base = base2;
-
 
240
                h = 1;
-
 
241
                break;
-
 
242
            }
-
 
243
        }
-
 
244
       
-
 
245
        if (!found) {
-
 
246
            // TODO: A/C precedence groups
-
 
247
            i = page % 8;
-
 
248
        }
-
 
249
    }
-
 
250
   
-
 
251
    phte_physical[base + i].v = 1;
-
 
252
    phte_physical[base + i].vsid = vsid;
-
 
253
    phte_physical[base + i].h = h;
-
 
254
    phte_physical[base + i].api = api;
-
 
255
    phte_physical[base + i].rpn = pfn;
-
 
256
    phte_physical[base + i].r = 0;
-
 
257
    phte_physical[base + i].c = 0;
-
 
258
    phte_physical[base + i].pp = 2; // FIXME
-
 
259
}
-
 
260
 
-
 
261
 
191
/** Process Instruction/Data Storage Interrupt
262
/** Process Instruction/Data Storage Interrupt
192
 *
263
 *
193
 * @param n Interrupt vector number.
264
 * @param n Interrupt vector number.
194
 * @param istate Interrupted register context.
265
 * @param istate Interrupted register context.
195
 *
266
 *
196
 */
267
 */
197
void pht_refill(int n, istate_t *istate)
268
void pht_refill(int n, istate_t *istate)
198
{
269
{
199
    __address badvaddr;
270
    __address badvaddr;
200
    pte_t *pte;
271
    pte_t *pte;
201
    int pfrc;
272
    int pfrc;
202
    as_t *as;
273
    as_t *as;
203
    bool lock;
274
    bool lock;
204
   
275
   
205
    if (AS == NULL) {
276
    if (AS == NULL) {
206
        as = AS_KERNEL;
277
        as = AS_KERNEL;
207
        lock = false;
278
        lock = false;
208
    } else {
279
    } else {
209
        as = AS;
280
        as = AS;
210
        lock = true;
281
        lock = true;
211
    }
282
    }
212
   
283
   
213
    if (n == VECTOR_DATA_STORAGE) {
284
    if (n == VECTOR_DATA_STORAGE) {
214
        asm volatile (
285
        asm volatile (
215
            "mfdar %0\n"
286
            "mfdar %0\n"
216
            : "=r" (badvaddr)
287
            : "=r" (badvaddr)
217
        );
288
        );
218
    } else
289
    } else
219
        badvaddr = istate->pc;
290
        badvaddr = istate->pc;
220
       
291
       
221
    page_table_lock(as, lock);
292
    page_table_lock(as, lock);
222
   
293
   
223
    pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfrc);
294
    pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfrc);
224
    if (!pte) {
295
    if (!pte) {
225
        switch (pfrc) {
296
        switch (pfrc) {
226
            case AS_PF_FAULT:
297
            case AS_PF_FAULT:
227
                goto fail;
298
                goto fail;
228
                break;
299
                break;
229
            case AS_PF_DEFER:
300
            case AS_PF_DEFER:
230
                /*
301
                /*
231
                 * The page fault came during copy_from_uspace()
302
                 * The page fault came during copy_from_uspace()
232
                 * or copy_to_uspace().
303
                 * or copy_to_uspace().
233
                 */
304
                 */
234
                page_table_unlock(as, lock);
305
                page_table_unlock(as, lock);
235
                return;
306
                return;
236
            default:
307
            default:
237
                panic("Unexpected pfrc (%d)\n", pfrc);
308
                panic("Unexpected pfrc (%d)\n", pfrc);
238
        }
309
        }
239
    }
310
    }
240
   
311
   
241
    pte->a = 1; /* Record access to PTE */
312
    pte->a = 1; /* Record access to PTE */
242
    pht_insert(badvaddr, pte->pfn);
313
    pht_insert(badvaddr, pte->pfn);
243
   
314
   
244
    page_table_unlock(as, lock);
315
    page_table_unlock(as, lock);
245
    return;
316
    return;
246
   
317
   
247
fail:
318
fail:
248
    page_table_unlock(as, lock);
319
    page_table_unlock(as, lock);
249
    pht_refill_fail(badvaddr, istate);
320
    pht_refill_fail(badvaddr, istate);
250
}
321
}
251
 
322
 
252
 
323
 
-
 
324
/** Process Instruction/Data Storage Interrupt in Real Mode
-
 
325
 *
-
 
326
 * @param n Interrupt vector number.
-
 
327
 * @param istate Interrupted register context.
-
 
328
 *
-
 
329
 */
-
 
330
bool pht_real_refill(int n, istate_t *istate)
-
 
331
{
-
 
332
    __address badvaddr;
-
 
333
   
-
 
334
    if (n == VECTOR_DATA_STORAGE) {
-
 
335
        asm volatile (
-
 
336
            "mfdar %0\n"
-
 
337
            : "=r" (badvaddr)
-
 
338
        );
-
 
339
    } else
-
 
340
        badvaddr = istate->pc;
-
 
341
   
-
 
342
    __u32 physmem;
-
 
343
    asm volatile (
-
 
344
        "mfsprg3 %0\n"
-
 
345
        : "=r" (physmem)
-
 
346
    );
-
 
347
   
-
 
348
    if ((badvaddr >= PA2KA(0)) && (badvaddr <= PA2KA(physmem))) {
-
 
349
        pht_real_insert(badvaddr, KA2PA(badvaddr) >> 12);
-
 
350
        return true;
-
 
351
    }
-
 
352
   
-
 
353
    return false;
-
 
354
}
-
 
355
 
-
 
356
 
253
void pht_init(void)
357
void pht_init(void)
254
{
358
{
-
 
359
    // FIXME
-
 
360
   
-
 
361
    __u32 sdr1;
-
 
362
    asm volatile (
-
 
363
        "mfsdr1 %0\n"
-
 
364
        : "=r" (sdr1)
-
 
365
    );
-
 
366
    phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
-
 
367
   
255
    memsetb((__address) phte, 1 << PHT_BITS, 0);
368
    memsetb((__address) phte, 65536, 0);
256
}
369
}
257
 
370
 
258
 
371
 
259
void page_arch_init(void)
372
void page_arch_init(void)
260
{
373
{
261
    if (config.cpu_active == 1) {
374
    if (config.cpu_active == 1)
262
        page_mapping_operations = &pt_mapping_operations;
375
        page_mapping_operations = &pt_mapping_operations;
263
       
-
 
264
        __address cur;
-
 
265
        int flags;
-
 
266
       
-
 
267
        /* Frames below 128 MB are mapped using BAT,
-
 
268
           map rest of the physical memory */
-
 
269
        for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) {
-
 
270
            flags = PAGE_CACHEABLE;
-
 
271
            if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size))
-
 
272
                flags |= PAGE_GLOBAL;
-
 
273
            page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
-
 
274
        }
-
 
275
       
-
 
276
        /* Allocate page hash table */
-
 
277
        phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC));
-
 
278
        phte = (phte_t *) PA2KA((__address) physical_phte);
-
 
279
       
-
 
280
        ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0);
-
 
281
        pht_init();
-
 
282
       
-
 
283
        asm volatile (
-
 
284
            "mtsdr1 %0\n"
-
 
285
            :
-
 
286
            : "r" ((__address) physical_phte)
-
 
287
        );
-
 
288
    }
-
 
289
}
376
}
290
 
377
 
291
 
378
 
292
__address hw_map(__address physaddr, size_t size)
379
__address hw_map(__address physaddr, size_t size)
293
{
380
{
294
    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
381
    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
295
        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
382
        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
296
   
383
   
297
    __address virtaddr = PA2KA(last_frame);
384
    __address virtaddr = PA2KA(last_frame);
298
    pfn_t i;
385
    pfn_t i;
299
    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
386
    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
300
        page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
387
        page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
301
   
388
   
302
    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
389
    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
303
   
390
   
304
    return virtaddr;
391
    return virtaddr;
305
}
392
}
306
 
393
 
307
 /** @}
394
/** @}
308
 */
395
 */
309
 
-
 
310
 
396