WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ppc32/src/asm.S


#
# Copyright (C) 2005 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
 
.text
 
.global userspace_asm
.global iret
.global memsetb
.global memcpy
 
userspace_asm:
 
	# r3 = uspace_uarg
	# r4 = stack
	# r5 = entry	
 
	mfmsr r31
	rlwinm r31, r31, 0, 17, 15
	mtmsr r31
	
	# set entry point
	
	mtsrr0 r5
	
	# set problem state, enable interrupts
	
	ori r31, r31, 1 << 14
	ori r31, r31, 1 << 15
	mtsrr1 r31
	
	# set stack
	
	mr sp, r4
	
	# jump to userspace
	
	rfi
 
iret:
	lwz r3, 144(sp)
	mtxer r3
	
	lwz r3, 140(sp)
	mtctr r3
	
	lwz r3, 136(sp)
	mtcr r3
	
	lwz r3, 132(sp)
	mtlr r3
	
	lwz r3, 128(sp)
	mtspr srr1, r3
	
	lwz r3, 124(sp)
	mtspr srr0, r3
	
	lwz r0, 0(sp)
	lwz r2, 4(sp)
	lwz r3, 8(sp)
	lwz r4, 12(sp)
	lwz r5, 16(sp)
	lwz r6, 20(sp)
	lwz r7, 24(sp)
	lwz r8, 28(sp)
	lwz r9, 32(sp)
	lwz r10, 36(sp)
	lwz r11, 40(sp)
	lwz r12, 44(sp)
	lwz r13, 48(sp)
	lwz r14, 52(sp)
	lwz r15, 56(sp)
	lwz r16, 60(sp)
	lwz r17, 64(sp)
	lwz r18, 68(sp)
	lwz r19, 72(sp)
	lwz r20, 76(sp)
	lwz r21, 80(sp)
	lwz r22, 84(sp)
	lwz r23, 88(sp)
	lwz r24, 92(sp)
	lwz r25, 96(sp)
	lwz r26, 100(sp)
	lwz r27, 104(sp)
	lwz r28, 108(sp)
	lwz r29, 112(sp)
	lwz r30, 116(sp)
	lwz r31, 120(sp)
	
	mfspr sp, sprg1
	
	rfi
	
memsetb:
	rlwimi r5, r5, 8, 16, 23
	rlwimi r5, r5, 16, 0, 15
	
	addi r14, r3, -4
	
	cmplwi 0, r4, 4
	blt 7f
	
	stwu r5, 4(r14)
	beqlr
	
	andi. r15, r14, 3
	add r4, r15, r4
	subf r14, r15, r14
	srwi r15, r4, 2
	mtctr r15
	
	bdz 6f
	
	1:
		stwu r5, 4(r14)
		bdnz 1b
	
	6:
	
	andi. r4, r4, 3
	
	7:
	
	cmpwi 0, r4, 0
	beqlr
	
	mtctr r4
	addi r6, r6, 3
	
	8:
	
	stbu r5, 1(r14)
	bdnz 8b
	
	blr
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 

Rev 1007	Rev 1220
1	#	1	#
2	# Copyright (C) 2005 Martin Decky	2	# Copyright (C) 2005 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include <arch/asm/regname.h>	29	#include <arch/asm/regname.h>
30		30
31	.text	31	.text
32		32
-		33	.global userspace_asm
33	.global iret	34	.global iret
34	.global memsetb	35	.global memsetb
35	.global memcpy	36	.global memcpy
36		37
-		38	userspace_asm:
-		39
-		40	# r3 = uspace_uarg
-		41	# r4 = stack
-		42	# r5 = entry
-		43
-		44	mfmsr r31
-		45	rlwinm r31, r31, 0, 17, 15
-		46	mtmsr r31
-		47
-		48	# set entry point
-		49
-		50	mtsrr0 r5
-		51
-		52	# set problem state, enable interrupts
-		53
-		54	ori r31, r31, 1 << 14
-		55	ori r31, r31, 1 << 15
-		56	mtsrr1 r31
-		57
-		58	# set stack
-		59
-		60	mr sp, r4
-		61
-		62	# jump to userspace
-		63
-		64	rfi
-		65
37	iret:	66	iret:
38	lwz r3, 144(sp)	67	lwz r3, 144(sp)
39	mtxer r3	68	mtxer r3
40		69
41	lwz r3, 140(sp)	70	lwz r3, 140(sp)
42	mtctr r3	71	mtctr r3
43		72
44	lwz r3, 136(sp)	73	lwz r3, 136(sp)
45	mtcr r3	74	mtcr r3
46		75
47	lwz r3, 132(sp)	76	lwz r3, 132(sp)
48	mtlr r3	77	mtlr r3
49		78
50	lwz r3, 128(sp)	79	lwz r3, 128(sp)
51	mtspr srr1, r3	80	mtspr srr1, r3
52		81
53	lwz r3, 124(sp)	82	lwz r3, 124(sp)
54	mtspr srr0, r3	83	mtspr srr0, r3
55		84
56	lwz r0, 0(sp)	85	lwz r0, 0(sp)
57	lwz r2, 4(sp)	86	lwz r2, 4(sp)
58	lwz r3, 8(sp)	87	lwz r3, 8(sp)
59	lwz r4, 12(sp)	88	lwz r4, 12(sp)
60	lwz r5, 16(sp)	89	lwz r5, 16(sp)
61	lwz r6, 20(sp)	90	lwz r6, 20(sp)
62	lwz r7, 24(sp)	91	lwz r7, 24(sp)
63	lwz r8, 28(sp)	92	lwz r8, 28(sp)
64	lwz r9, 32(sp)	93	lwz r9, 32(sp)
65	lwz r10, 36(sp)	94	lwz r10, 36(sp)
66	lwz r11, 40(sp)	95	lwz r11, 40(sp)
67	lwz r12, 44(sp)	96	lwz r12, 44(sp)
68	lwz r13, 48(sp)	97	lwz r13, 48(sp)
69	lwz r14, 52(sp)	98	lwz r14, 52(sp)
70	lwz r15, 56(sp)	99	lwz r15, 56(sp)
71	lwz r16, 60(sp)	100	lwz r16, 60(sp)
72	lwz r17, 64(sp)	101	lwz r17, 64(sp)
73	lwz r18, 68(sp)	102	lwz r18, 68(sp)
74	lwz r19, 72(sp)	103	lwz r19, 72(sp)
75	lwz r20, 76(sp)	104	lwz r20, 76(sp)
76	lwz r21, 80(sp)	105	lwz r21, 80(sp)
77	lwz r22, 84(sp)	106	lwz r22, 84(sp)
78	lwz r23, 88(sp)	107	lwz r23, 88(sp)
79	lwz r24, 92(sp)	108	lwz r24, 92(sp)
80	lwz r25, 96(sp)	109	lwz r25, 96(sp)
81	lwz r26, 100(sp)	110	lwz r26, 100(sp)
82	lwz r27, 104(sp)	111	lwz r27, 104(sp)
83	lwz r28, 108(sp)	112	lwz r28, 108(sp)
84	lwz r29, 112(sp)	113	lwz r29, 112(sp)
85	lwz r30, 116(sp)	114	lwz r30, 116(sp)
86	lwz r31, 120(sp)	115	lwz r31, 120(sp)
87		116
88	mfspr sp, sprg1	117	mfspr sp, sprg1
89		118
90	rfi	119	rfi
91		120
92	memsetb:	121	memsetb:
93	rlwimi r5, r5, 8, 16, 23	122	rlwimi r5, r5, 8, 16, 23
94	rlwimi r5, r5, 16, 0, 15	123	rlwimi r5, r5, 16, 0, 15
95		124
96	addi r14, r3, -4	125	addi r14, r3, -4
97		126
98	cmplwi 0, r4, 4	127	cmplwi 0, r4, 4
99	blt 7f	128	blt 7f
100		129
101	stwu r5, 4(r14)	130	stwu r5, 4(r14)
102	beqlr	131	beqlr
103		132
104	andi. r15, r14, 3	133	andi. r15, r14, 3
105	add r4, r15, r4	134	add r4, r15, r4
106	subf r14, r15, r14	135	subf r14, r15, r14
107	srwi r15, r4, 2	136	srwi r15, r4, 2
108	mtctr r15	137	mtctr r15
109		138
110	bdz 6f	139	bdz 6f
111		140
112	1:	141	1:
113	stwu r5, 4(r14)	142	stwu r5, 4(r14)
114	bdnz 1b	143	bdnz 1b
115		144
116	6:	145	6:
117		146
118	andi. r4, r4, 3	147	andi. r4, r4, 3
119		148
120	7:	149	7:
121		150
122	cmpwi 0, r4, 0	151	cmpwi 0, r4, 0
123	beqlr	152	beqlr
124		153
125	mtctr r4	154	mtctr r4
126	addi r6, r6, 3	155	addi r6, r6, 3
127		156
128	8:	157	8:
129		158
130	stbu r5, 1(r14)	159	stbu r5, 1(r14)
131	bdnz 8b	160	bdnz 8b
132		161
133	blr	162	blr
134		163
135	memcpy:	164	memcpy:
136	srwi. r7, r5, 3	165	srwi. r7, r5, 3
137	addi r6, r3, -4	166	addi r6, r3, -4
138	addi r4, r4, -4	167	addi r4, r4, -4
139	beq 2f	168	beq 2f
140		169
141	andi. r0, r6, 3	170	andi. r0, r6, 3
142	mtctr r7	171	mtctr r7
143	bne 5f	172	bne 5f
144		173
145	1:	174	1:
146		175
147	lwz r7, 4(r4)	176	lwz r7, 4(r4)
148	lwzu r8, 8(r4)	177	lwzu r8, 8(r4)
149	stw r7, 4(r6)	178	stw r7, 4(r6)
150	stwu r8, 8(r6)	179	stwu r8, 8(r6)
151	bdnz 1b	180	bdnz 1b
152		181
153	andi. r5, r5, 7	182	andi. r5, r5, 7
154		183
155	2:	184	2:
156		185
157	cmplwi 0, r5, 4	186	cmplwi 0, r5, 4
158	blt 3f	187	blt 3f
159		188
160	lwzu r0, 4(r4)	189	lwzu r0, 4(r4)
161	addi r5, r5, -4	190	addi r5, r5, -4
162	stwu r0, 4(r6)	191	stwu r0, 4(r6)
163		192
164	3:	193	3:
165		194
166	cmpwi 0, r5, 0	195	cmpwi 0, r5, 0
167	beqlr	196	beqlr
168	mtctr r5	197	mtctr r5
169	addi r4, r4, 3	198	addi r4, r4, 3
170	addi r6, r6, 3	199	addi r6, r6, 3
171		200
172	4:	201	4:
173		202
174	lbzu r0, 1(r4)	203	lbzu r0, 1(r4)
175	stbu r0, 1(r6)	204	stbu r0, 1(r6)
176	bdnz 4b	205	bdnz 4b
177	blr	206	blr
178		207
179	5:	208	5:
180		209
181	subfic r0, r0, 4	210	subfic r0, r0, 4
182	mtctr r0	211	mtctr r0
183		212
184	6:	213	6:
185		214
186	lbz r7, 4(r4)	215	lbz r7, 4(r4)
187	addi r4, r4, 1	216	addi r4, r4, 1
188	stb r7, 4(r6)	217	stb r7, 4(r6)
189	addi r6, r6, 1	218	addi r6, r6, 1
190	bdnz 6b	219	bdnz 6b
191	subf r5, r0, r5	220	subf r5, r0, r5
192	rlwinm. r7, r5, 32-3, 3, 31	221	rlwinm. r7, r5, 32-3, 3, 31
193	beq 2b	222	beq 2b
194	mtctr r7	223	mtctr r7
195	b 1b	224	b 1b
196		225

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ppc32/src/asm.S – Rev 1007 → 1220