WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ppc32/src/asm.S


#
# Copyright (C) 2005 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
 
.text
 
 
.global iret
.global memsetb
.global memcpy
 
 
 
 
iret:
	lwz r3, 144(sp)
	mtxer r3
	
	lwz r3, 140(sp)
	mtctr r3
	
	lwz r3, 136(sp)
	mtcr r3
	
	lwz r3, 132(sp)
	mtlr r3
	
	lwz r3, 128(sp)
	mtspr srr1, r3
	
	lwz r3, 124(sp)
	mtspr srr0, r3
	
	lwz r0, 0(sp)
	lwz r2, 4(sp)
	lwz r3, 8(sp)
	lwz r4, 12(sp)
	lwz r5, 16(sp)
	lwz r6, 20(sp)
	lwz r7, 24(sp)
	lwz r8, 28(sp)
	lwz r9, 32(sp)
	lwz r10, 36(sp)
	lwz r11, 40(sp)
	lwz r12, 44(sp)
	lwz r13, 48(sp)
	lwz r14, 52(sp)
	lwz r15, 56(sp)
	lwz r16, 60(sp)
	lwz r17, 64(sp)
	lwz r18, 68(sp)
	lwz r19, 72(sp)
	lwz r20, 76(sp)
	lwz r21, 80(sp)
	lwz r22, 84(sp)
	lwz r23, 88(sp)
	lwz r24, 92(sp)
	lwz r25, 96(sp)
	lwz r26, 100(sp)
	lwz r27, 104(sp)
	lwz r28, 108(sp)
	lwz r29, 112(sp)
	lwz r30, 116(sp)
	lwz r31, 120(sp)
	
	mfspr sp, sprg1
	
	rfi
	
memsetb:
	rlwimi r5, r5, 8, 16, 23
	rlwimi r5, r5, 16, 0, 15
	
	addi r14, r3, -4
	
	cmplwi 0, r4, 4
	blt 7f
	
	stwu r5, 4(r14)
	beqlr
	
	andi. r15, r14, 3
	add r4, r15, r4
	subf r14, r15, r14
	srwi r15, r4, 2
	mtctr r15
	
	bdz 6f
	
	1:
		stwu r5, 4(r14)
		bdnz 1b
	
	6:
	
	andi. r4, r4, 3
	
	7:
	
	cmpwi 0, r4, 0
	beqlr
	
	mtctr r4
	addi r6, r6, 3
	
	8:
	
	stbu r5, 1(r14)
	bdnz 8b
	
	blr
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 

Rev 1004	Rev 1007
1	#	1	#
2	# Copyright (C) 2005 Martin Decky	2	# Copyright (C) 2005 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include <arch/asm/regname.h>	29	#include <arch/asm/regname.h>
30		30
31	.text	31	.text
32		32
33	.global cpu_sleep	-
34	.global iret	33	.global iret
35	.global memsetb	34	.global memsetb
36	.global memcpy	35	.global memcpy
37		36
38	cpu_sleep:	-
39	b cpu_sleep	-
40		-
41	iret:	37	iret:
42	lwz r3, 144(sp)	38	lwz r3, 144(sp)
43	mtxer r3	39	mtxer r3
44		40
45	lwz r3, 140(sp)	41	lwz r3, 140(sp)
46	mtctr r3	42	mtctr r3
47		43
48	lwz r3, 136(sp)	44	lwz r3, 136(sp)
49	mtcr r3	45	mtcr r3
50		46
51	lwz r3, 132(sp)	47	lwz r3, 132(sp)
52	mtlr r3	48	mtlr r3
53		49
54	lwz r3, 128(sp)	50	lwz r3, 128(sp)
55	mtspr srr1, r3	51	mtspr srr1, r3
56		52
57	lwz r3, 124(sp)	53	lwz r3, 124(sp)
58	mtspr srr0, r3	54	mtspr srr0, r3
59		55
60	lwz r0, 0(sp)	56	lwz r0, 0(sp)
61	lwz r2, 4(sp)	57	lwz r2, 4(sp)
62	lwz r3, 8(sp)	58	lwz r3, 8(sp)
63	lwz r4, 12(sp)	59	lwz r4, 12(sp)
64	lwz r5, 16(sp)	60	lwz r5, 16(sp)
65	lwz r6, 20(sp)	61	lwz r6, 20(sp)
66	lwz r7, 24(sp)	62	lwz r7, 24(sp)
67	lwz r8, 28(sp)	63	lwz r8, 28(sp)
68	lwz r9, 32(sp)	64	lwz r9, 32(sp)
69	lwz r10, 36(sp)	65	lwz r10, 36(sp)
70	lwz r11, 40(sp)	66	lwz r11, 40(sp)
71	lwz r12, 44(sp)	67	lwz r12, 44(sp)
72	lwz r13, 48(sp)	68	lwz r13, 48(sp)
73	lwz r14, 52(sp)	69	lwz r14, 52(sp)
74	lwz r15, 56(sp)	70	lwz r15, 56(sp)
75	lwz r16, 60(sp)	71	lwz r16, 60(sp)
76	lwz r17, 64(sp)	72	lwz r17, 64(sp)
77	lwz r18, 68(sp)	73	lwz r18, 68(sp)
78	lwz r19, 72(sp)	74	lwz r19, 72(sp)
79	lwz r20, 76(sp)	75	lwz r20, 76(sp)
80	lwz r21, 80(sp)	76	lwz r21, 80(sp)
81	lwz r22, 84(sp)	77	lwz r22, 84(sp)
82	lwz r23, 88(sp)	78	lwz r23, 88(sp)
83	lwz r24, 92(sp)	79	lwz r24, 92(sp)
84	lwz r25, 96(sp)	80	lwz r25, 96(sp)
85	lwz r26, 100(sp)	81	lwz r26, 100(sp)
86	lwz r27, 104(sp)	82	lwz r27, 104(sp)
87	lwz r28, 108(sp)	83	lwz r28, 108(sp)
88	lwz r29, 112(sp)	84	lwz r29, 112(sp)
89	lwz r30, 116(sp)	85	lwz r30, 116(sp)
90	lwz r31, 120(sp)	86	lwz r31, 120(sp)
91		87
92	mfspr sp, sprg1	88	mfspr sp, sprg1
93		89
94	rfi	90	rfi
95		91
96	memsetb:	92	memsetb:
97	rlwimi r5, r5, 8, 16, 23	93	rlwimi r5, r5, 8, 16, 23
98	rlwimi r5, r5, 16, 0, 15	94	rlwimi r5, r5, 16, 0, 15
99		95
100	addi r14, r3, -4	96	addi r14, r3, -4
101		97
102	cmplwi 0, r4, 4	98	cmplwi 0, r4, 4
103	blt 7f	99	blt 7f
104		100
105	stwu r5, 4(r14)	101	stwu r5, 4(r14)
106	beqlr	102	beqlr
107		103
108	andi. r15, r14, 3	104	andi. r15, r14, 3
109	add r4, r15, r4	105	add r4, r15, r4
110	subf r14, r15, r14	106	subf r14, r15, r14
111	srwi r15, r4, 2	107	srwi r15, r4, 2
112	mtctr r15	108	mtctr r15
113		109
114	bdz 6f	110	bdz 6f
115		111
116	1:	112	1:
117	stwu r5, 4(r14)	113	stwu r5, 4(r14)
118	bdnz 1b	114	bdnz 1b
119		115
120	6:	116	6:
121		117
122	andi. r4, r4, 3	118	andi. r4, r4, 3
123		119
124	7:	120	7:
125		121
126	cmpwi 0, r4, 0	122	cmpwi 0, r4, 0
127	beqlr	123	beqlr
128		124
129	mtctr r4	125	mtctr r4
130	addi r6, r6, 3	126	addi r6, r6, 3
131		127
132	8:	128	8:
133		129
134	stbu r5, 1(r14)	130	stbu r5, 1(r14)
135	bdnz 8b	131	bdnz 8b
136		132
137	blr	133	blr
138		134
139	memcpy:	135	memcpy:
140	srwi. r7, r5, 3	136	srwi. r7, r5, 3
141	addi r6, r3, -4	137	addi r6, r3, -4
142	addi r4, r4, -4	138	addi r4, r4, -4
143	beq 2f	139	beq 2f
144		140
145	andi. r0, r6, 3	141	andi. r0, r6, 3
146	mtctr r7	142	mtctr r7
147	bne 5f	143	bne 5f
148		144
149	1:	145	1:
150		146
151	lwz r7, 4(r4)	147	lwz r7, 4(r4)
152	lwzu r8, 8(r4)	148	lwzu r8, 8(r4)
153	stw r7, 4(r6)	149	stw r7, 4(r6)
154	stwu r8, 8(r6)	150	stwu r8, 8(r6)
155	bdnz 1b	151	bdnz 1b
156		152
157	andi. r5, r5, 7	153	andi. r5, r5, 7
158		154
159	2:	155	2:
160		156
161	cmplwi 0, r5, 4	157	cmplwi 0, r5, 4
162	blt 3f	158	blt 3f
163		159
164	lwzu r0, 4(r4)	160	lwzu r0, 4(r4)
165	addi r5, r5, -4	161	addi r5, r5, -4
166	stwu r0, 4(r6)	162	stwu r0, 4(r6)
167		163
168	3:	164	3:
169		165
170	cmpwi 0, r5, 0	166	cmpwi 0, r5, 0
171	beqlr	167	beqlr
172	mtctr r5	168	mtctr r5
173	addi r4, r4, 3	169	addi r4, r4, 3
174	addi r6, r6, 3	170	addi r6, r6, 3
175		171
176	4:	172	4:
177		173
178	lbzu r0, 1(r4)	174	lbzu r0, 1(r4)
179	stbu r0, 1(r6)	175	stbu r0, 1(r6)
180	bdnz 4b	176	bdnz 4b
181	blr	177	blr
182		178
183	5:	179	5:
184		180
185	subfic r0, r0, 4	181	subfic r0, r0, 4
186	mtctr r0	182	mtctr r0
187		183
188	6:	184	6:
189		185
190	lbz r7, 4(r4)	186	lbz r7, 4(r4)
191	addi r4, r4, 1	187	addi r4, r4, 1
192	stb r7, 4(r6)	188	stb r7, 4(r6)
193	addi r6, r6, 1	189	addi r6, r6, 1
194	bdnz 6b	190	bdnz 6b
195	subf r5, r0, r5	191	subf r5, r0, r5
196	rlwinm. r7, r5, 32-3, 3, 31	192	rlwinm. r7, r5, 32-3, 3, 31
197	beq 2b	193	beq 2b
198	mtctr r7	194	mtctr r7
199	b 1b	195	b 1b
200		196

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(root)/kernel/trunk/arch/ppc32/src/asm.S – Rev 1004 → 1007