WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ppc32/include/mm/page.h


/*
 * Copyright (C) 2005 Martin Decky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __ppc32_PAGE_H__
#define __ppc32_PAGE_H__
 
#include <arch/mm/frame.h>
 
#define PAGE_WIDTH  FRAME_WIDTH
#define PAGE_SIZE   FRAME_SIZE
 
#ifdef KERNEL
 
#ifndef __ASM__
#   define KA2PA(x) (((__address) (x)) - 0x80000000)
#   define PA2KA(x) (((__address) (x)) + 0x80000000)
#else
#   define KA2PA(x) ((x) - 0x80000000)
#   define PA2KA(x) ((x) + 0x80000000)
#endif
 
/*
 * Implementation of generic 4-level page table interface,
 * the hardware Page Hash Table is used as cache.
 *
 * Page table layout:
 * - 32-bit virtual addressess
 * - Offset is 12 bits => pages are 4K long
 * - PTL0 has 1024 entries (10 bits)
 * - PTL1 is not used
 * - PTL2 is not used
 * - PLT3 has 1024 entries (10 bits)
 */
 
#define PTL0_ENTRIES_ARCH   1024
#define PTL1_ENTRIES_ARCH   0
#define PTL2_ENTRIES_ARCH   0
#define PTL3_ENTRIES_ARCH   1024
 
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr)  0
#define PTL2_INDEX_ARCH(vaddr)  0
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
 
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *) (ptl0))[(i)].pfn << 12)
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *) (ptl3))[(i)].pfn << 12)
 
#define SET_PTL0_ADDRESS_ARCH(ptl0)
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)
 
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t) (i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t) (i))
 
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
 
#define PTE_VALID_ARCH(pte)         (*((__u32 *) (pte)) != 0)
#define PTE_PRESENT_ARCH(pte)           ((pte)->p != 0)
#define PTE_GET_FRAME_ARCH(pte)         ((pte)->pfn << 12)
#define PTE_WRITABLE_ARCH(pte)          1
#define PTE_EXECUTABLE_ARCH(pte)        1
 
#ifndef __ASM__
 
#include <mm/page.h>
#include <arch/mm/frame.h>
#include <arch/types.h>
 
static inline int get_pt_flags(pte_t *pt, index_t i)
{
    pte_t *p = &pt[i];
   
    return (
        (1 << PAGE_CACHEABLE_SHIFT) |
        ((!p->p) << PAGE_PRESENT_SHIFT) |
        (1 << PAGE_USER_SHIFT) |
        (1 << PAGE_READ_SHIFT) |
        (1 << PAGE_WRITE_SHIFT) |
        (1 << PAGE_EXEC_SHIFT) |
        (p->g << PAGE_GLOBAL_SHIFT)
    );
}
 
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
    pte_t *p = &pt[i];
   
    p->p = !(flags & PAGE_NOT_PRESENT);
    p->g = (flags & PAGE_GLOBAL) != 0;
    p->valid = 1;
}
 
extern void page_arch_init(void);
 
#define PHT_BITS    16
#define PHT_ORDER   4
 
typedef struct {
    unsigned v : 1;          /**< Valid */
    unsigned vsid : 24;      /**< Virtual Segment ID */
    unsigned h : 1;          /**< Primary/secondary hash */
    unsigned api : 6;        /**< Abbreviated Page Index */
    unsigned rpn : 20;       /**< Real Page Number */
    unsigned reserved0 : 3;
    unsigned r : 1;          /**< Reference */
    unsigned c : 1;          /**< Change */
    unsigned wimg : 4;       /**< Access control */
    unsigned reserved1 : 1;
    unsigned pp : 2;         /**< Page protection */
} phte_t;
 
extern void pht_refill(int n, istate_t *istate);
extern void pht_init(void);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ppc32/include/mm/page.h – Rev 1423 → 1609

Rev 1423		Rev 1609
1	/*	1	/*
2	* Copyright (C) 2005 Martin Decky	2	* Copyright (C) 2005 Martin Decky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifndef __ppc32_PAGE_H__	29	#ifndef __ppc32_PAGE_H__
30	#define __ppc32_PAGE_H__	30	#define __ppc32_PAGE_H__
31		31
32	#include <arch/mm/frame.h>	32	#include <arch/mm/frame.h>
33		33
34	#define PAGE_WIDTH FRAME_WIDTH	34	#define PAGE_WIDTH FRAME_WIDTH
35	#define PAGE_SIZE FRAME_SIZE	35	#define PAGE_SIZE FRAME_SIZE
36		36
37	#ifdef KERNEL	37	#ifdef KERNEL
38		38
39	#ifndef __ASM__	39	#ifndef __ASM__
40	# define KA2PA(x) (((__address) (x)) - 0x80000000)	40	# define KA2PA(x) (((__address) (x)) - 0x80000000)
41	# define PA2KA(x) (((__address) (x)) + 0x80000000)	41	# define PA2KA(x) (((__address) (x)) + 0x80000000)
42	#else	42	#else
43	# define KA2PA(x) ((x) - 0x80000000)	43	# define KA2PA(x) ((x) - 0x80000000)
44	# define PA2KA(x) ((x) + 0x80000000)	44	# define PA2KA(x) ((x) + 0x80000000)
45	#endif	45	#endif
46		46
47	/*	47	/*
48	* Implementation of generic 4-level page table interface,	48	* Implementation of generic 4-level page table interface,
49	* the hardware Page Hash Table is used as cache.	49	* the hardware Page Hash Table is used as cache.
50	*	50	*
51	* Page table layout:	51	* Page table layout:
52	* - 32-bit virtual addressess	52	* - 32-bit virtual addressess
53	* - Offset is 12 bits => pages are 4K long	53	* - Offset is 12 bits => pages are 4K long
54	* - PTL0 has 1024 entries (10 bits)	54	* - PTL0 has 1024 entries (10 bits)
55	* - PTL1 is not used	55	* - PTL1 is not used
56	* - PTL2 is not used	56	* - PTL2 is not used
57	* - PLT3 has 1024 entries (10 bits)	57	* - PLT3 has 1024 entries (10 bits)
58	*/	58	*/
59		59
60	#define PTL0_ENTRIES_ARCH 1024	60	#define PTL0_ENTRIES_ARCH 1024
61	#define PTL1_ENTRIES_ARCH 0	61	#define PTL1_ENTRIES_ARCH 0
62	#define PTL2_ENTRIES_ARCH 0	62	#define PTL2_ENTRIES_ARCH 0
63	#define PTL3_ENTRIES_ARCH 1024	63	#define PTL3_ENTRIES_ARCH 1024
64		64
65	#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)	65	#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
66	#define PTL1_INDEX_ARCH(vaddr) 0	66	#define PTL1_INDEX_ARCH(vaddr) 0
67	#define PTL2_INDEX_ARCH(vaddr) 0	67	#define PTL2_INDEX_ARCH(vaddr) 0
68	#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)	68	#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)
69		69
70	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *) (ptl0))[(i)].pfn << 12)	70	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *) (ptl0))[(i)].pfn << 12)
71	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)	71	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
72	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)	72	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
73	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *) (ptl3))[(i)].pfn << 12)	73	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *) (ptl3))[(i)].pfn << 12)
74		74
75	#define SET_PTL0_ADDRESS_ARCH(ptl0)	75	#define SET_PTL0_ADDRESS_ARCH(ptl0)
76	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)	76	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)
77	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)	77	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
78	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)	78	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
79	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)	79	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)
80		80
81	#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *) (ptl0), (index_t) (i))	81	#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *) (ptl0), (index_t) (i))
82	#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT	82	#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
83	#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT	83	#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
84	#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *) (ptl3), (index_t) (i))	84	#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *) (ptl3), (index_t) (i))
85		85
86	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))	86	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
87	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)	87	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
88	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)	88	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
89	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))	89	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
90		90
91	#define PTE_VALID_ARCH(pte) (((__u32 ) (pte)) != 0)	91	#define PTE_VALID_ARCH(pte) (((__u32 ) (pte)) != 0)
92	#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0)	92	#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0)
93	#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12)	93	#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12)
94	#define PTE_WRITABLE_ARCH(pte) 1	94	#define PTE_WRITABLE_ARCH(pte) 1
95	#define PTE_EXECUTABLE_ARCH(pte) 1	95	#define PTE_EXECUTABLE_ARCH(pte) 1
96		96
97	#ifndef __ASM__	97	#ifndef __ASM__
98		98
99	#include <mm/page.h>	99	#include <mm/page.h>
100	#include <arch/mm/frame.h>	100	#include <arch/mm/frame.h>
101	#include <arch/types.h>	101	#include <arch/types.h>
102		102
103	static inline int get_pt_flags(pte_t *pt, index_t i)	103	static inline int get_pt_flags(pte_t *pt, index_t i)
104	{	104	{
105	pte_t *p = &pt[i];	105	pte_t *p = &pt[i];
106		106
107	return (	107	return (
108	(1 << PAGE_CACHEABLE_SHIFT) \|	108	(1 << PAGE_CACHEABLE_SHIFT) \|
109	((!p->p) << PAGE_PRESENT_SHIFT) \|	109	((!p->p) << PAGE_PRESENT_SHIFT) \|
110	(1 << PAGE_USER_SHIFT) \|	110	(1 << PAGE_USER_SHIFT) \|
111	(1 << PAGE_READ_SHIFT) \|	111	(1 << PAGE_READ_SHIFT) \|
112	(1 << PAGE_WRITE_SHIFT) \|	112	(1 << PAGE_WRITE_SHIFT) \|
113	(1 << PAGE_EXEC_SHIFT) \|	113	(1 << PAGE_EXEC_SHIFT) \|
114	(p->g << PAGE_GLOBAL_SHIFT)	114	(p->g << PAGE_GLOBAL_SHIFT)
115	);	115	);
116	}	116	}
117		117
118	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)	118	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
119	{	119	{
120	pte_t *p = &pt[i];	120	pte_t *p = &pt[i];
121		121
122	p->p = !(flags & PAGE_NOT_PRESENT);	122	p->p = !(flags & PAGE_NOT_PRESENT);
123	p->g = (flags & PAGE_GLOBAL) != 0;	123	p->g = (flags & PAGE_GLOBAL) != 0;
124	p->valid = 1;	124	p->valid = 1;
125	}	125	}
126		126
127	extern void page_arch_init(void);	127	extern void page_arch_init(void);
128		128
129	#define PHT_BITS 16	129	#define PHT_BITS 16
130	#define PHT_ORDER 4	130	#define PHT_ORDER 4
131		131
132	typedef struct {	132	typedef struct {
133	unsigned v : 1; /*< Valid /	133	unsigned v : 1; /*< Valid /
134	unsigned vsid : 24; /*< Virtual Segment ID /	134	unsigned vsid : 24; /*< Virtual Segment ID /
135	unsigned h : 1; /*< Primary/secondary hash /	135	unsigned h : 1; /*< Primary/secondary hash /
136	unsigned api : 6; /*< Abbreviated Page Index /	136	unsigned api : 6; /*< Abbreviated Page Index /
137	unsigned rpn : 20; /*< Real Page Number /	137	unsigned rpn : 20; /*< Real Page Number /
138	unsigned reserved0 : 3;	138	unsigned reserved0 : 3;
139	unsigned r : 1; /*< Reference /	139	unsigned r : 1; /*< Reference /
140	unsigned c : 1; /*< Change /	140	unsigned c : 1; /*< Change /
141	unsigned wimg : 4; /*< Access control /	141	unsigned wimg : 4; /*< Access control /
142	unsigned reserved1 : 1;	142	unsigned reserved1 : 1;
143	unsigned pp : 2; /*< Page protection /	143	unsigned pp : 2; /*< Page protection /
144	} phte_t;	144	} phte_t;
145		145
146	extern void pht_refill(bool data, istate_t *istate);	146	extern void pht_refill(int n, istate_t *istate);
147	extern void pht_init(void);	147	extern void pht_init(void);
148		148
149	#endif /* __ASM__ */	149	#endif /* __ASM__ */
150		150
151	#endif /* KERNEL */	151	#endif /* KERNEL */
152		152
153	#endif	153	#endif
154		154