WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/mips32/src/mips32.c


/*
 * Copyright (C) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 /** @addtogroup mips32
 
 * @{
 */
/** @file
 */
 
 
#include <arch.h>
#include <arch/boot.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <arch/asm.h>
#include <mm/as.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <proc/uarg.h>
#include <print.h>
#include <syscall/syscall.h>
#include <sysinfo/sysinfo.h>
 
#include <arch/interrupt.h>
#include <arch/drivers/arc.h>
#include <console/chardev.h>
#include <arch/debugger.h>
#include <genarch/fb/fb.h>
#include <debug.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE    8
 
#define TLB_EXC ((char *) 0x80000000)
#define NORM_EXC ((char *) 0x80000180)
#define CACHE_EXC ((char *) 0x80000100)
 
bootinfo_t bootinfo;
 
void arch_pre_main(void)
{
    /* Setup usermode */
    init.cnt = bootinfo.cnt;
   
    __u32 i;
   
    for (i = 0; i < bootinfo.cnt; i++) {
        init.tasks[i].addr = bootinfo.tasks[i].addr;
        init.tasks[i].size = bootinfo.tasks[i].size;
    }
}
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
    arc_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
 
    interrupt_init();
    /*
     * Switch to BEV normal level so that exception vectors point to the kernel.
     * Clear the error level.
     */
    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
 
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
 
    /*
     * Unmask hardware clock interrupt.
     */
    cp0_unmask_int(TIMER_IRQ);
 
    console_init();
    debugger_init();
}
 
void arch_post_mm_init(void)
{
#ifdef CONFIG_FB
        fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer
#endif
        sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1);
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
}
 
/* Stack pointer saved when entering user mode */
/* TODO: How do we do it on SMP system???? */
 
/* Why the linker moves the variable 64K away in assembler
 * when not in .text section ????????
 */
__address supervisor_sp __attribute__ ((section (".text")));
 
void userspace(uspace_arg_t *kernel_uarg)
{
    /* EXL=1, UM=1, IE=1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
                          cp0_status_um_bit |
                          cp0_status_ie_enabled_bit));
    cp0_epc_write((__address) kernel_uarg->uspace_entry);
    userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
              (__address) kernel_uarg->uspace_uarg,
              (__address) kernel_uarg->uspace_entry);
    while (1)
        ;
}
 
/** Perform mips32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
}
 
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
}
 
/** Set thread-local-storage pointer
 *
 * We have it currently in K1, it is
 * possible to have it separately in the future.
 */
__native sys_tls_set(__native addr)
{
    return 0;
}
 
 
 /** @}
 */
 
 

Rev 1704	Rev 1705
1	/*	1	/*
2	* Copyright (C) 2003-2004 Jakub Jermar	2	* Copyright (C) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32 mips32	29	/** @addtogroup mips32
30	* @ingroup others	-
31	* @{	30	* @{
32	*/	31	*/
33	/** @file	32	/** @file
34	*/	33	*/
35		34
36		35
37	#include <arch.h>	36	#include <arch.h>
38	#include <arch/boot.h>	37	#include <arch/boot.h>
39	#include <arch/cp0.h>	38	#include <arch/cp0.h>
40	#include <arch/exception.h>	39	#include <arch/exception.h>
41	#include <arch/asm.h>	40	#include <arch/asm.h>
42	#include <mm/as.h>	41	#include <mm/as.h>
43		42
44	#include <userspace.h>	43	#include <userspace.h>
45	#include <arch/console.h>	44	#include <arch/console.h>
46	#include <memstr.h>	45	#include <memstr.h>
47	#include <proc/thread.h>	46	#include <proc/thread.h>
48	#include <proc/uarg.h>	47	#include <proc/uarg.h>
49	#include <print.h>	48	#include <print.h>
50	#include <syscall/syscall.h>	49	#include <syscall/syscall.h>
51	#include <sysinfo/sysinfo.h>	50	#include <sysinfo/sysinfo.h>
52		51
53	#include <arch/interrupt.h>	52	#include <arch/interrupt.h>
54	#include <arch/drivers/arc.h>	53	#include <arch/drivers/arc.h>
55	#include <console/chardev.h>	54	#include <console/chardev.h>
56	#include <arch/debugger.h>	55	#include <arch/debugger.h>
57	#include <genarch/fb/fb.h>	56	#include <genarch/fb/fb.h>
58	#include <debug.h>	57	#include <debug.h>
59		58
60	#include <arch/asm/regname.h>	59	#include <arch/asm/regname.h>
61		60
62	/* Size of the code jumping to the exception handler code	61	/* Size of the code jumping to the exception handler code
63	* - J+NOP	62	* - J+NOP
64	*/	63	*/
65	#define EXCEPTION_JUMP_SIZE 8	64	#define EXCEPTION_JUMP_SIZE 8
66		65
67	#define TLB_EXC ((char *) 0x80000000)	66	#define TLB_EXC ((char *) 0x80000000)
68	#define NORM_EXC ((char *) 0x80000180)	67	#define NORM_EXC ((char *) 0x80000180)
69	#define CACHE_EXC ((char *) 0x80000100)	68	#define CACHE_EXC ((char *) 0x80000100)
70		69
71	bootinfo_t bootinfo;	70	bootinfo_t bootinfo;
72		71
73	void arch_pre_main(void)	72	void arch_pre_main(void)
74	{	73	{
75	/* Setup usermode */	74	/* Setup usermode */
76	init.cnt = bootinfo.cnt;	75	init.cnt = bootinfo.cnt;
77		76
78	__u32 i;	77	__u32 i;
79		78
80	for (i = 0; i < bootinfo.cnt; i++) {	79	for (i = 0; i < bootinfo.cnt; i++) {
81	init.tasks[i].addr = bootinfo.tasks[i].addr;	80	init.tasks[i].addr = bootinfo.tasks[i].addr;
82	init.tasks[i].size = bootinfo.tasks[i].size;	81	init.tasks[i].size = bootinfo.tasks[i].size;
83	}	82	}
84	}	83	}
85		84
86	void arch_pre_mm_init(void)	85	void arch_pre_mm_init(void)
87	{	86	{
88	/* It is not assumed by default */	87	/* It is not assumed by default */
89	interrupts_disable();	88	interrupts_disable();
90		89
91	/* Initialize dispatch table */	90	/* Initialize dispatch table */
92	exception_init();	91	exception_init();
93	arc_init();	92	arc_init();
94		93
95	/* Copy the exception vectors to the right places */	94	/* Copy the exception vectors to the right places */
96	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);	95	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
97	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);	96	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
98	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);	97	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
99		98
100	interrupt_init();	99	interrupt_init();
101	/*	100	/*
102	* Switch to BEV normal level so that exception vectors point to the kernel.	101	* Switch to BEV normal level so that exception vectors point to the kernel.
103	* Clear the error level.	102	* Clear the error level.
104	*/	103	*/
105	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));	104	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));
106		105
107	/*	106	/*
108	* Mask all interrupts	107	* Mask all interrupts
109	*/	108	*/
110	cp0_mask_all_int();	109	cp0_mask_all_int();
111		110
112	/*	111	/*
113	* Unmask hardware clock interrupt.	112	* Unmask hardware clock interrupt.
114	*/	113	*/
115	cp0_unmask_int(TIMER_IRQ);	114	cp0_unmask_int(TIMER_IRQ);
116		115
117	console_init();	116	console_init();
118	debugger_init();	117	debugger_init();
119	}	118	}
120		119
121	void arch_post_mm_init(void)	120	void arch_post_mm_init(void)
122	{	121	{
123	#ifdef CONFIG_FB	122	#ifdef CONFIG_FB
124	fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer	123	fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer
125	#endif	124	#endif
126	sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1);	125	sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1);
127	}	126	}
128		127
129	void arch_pre_smp_init(void)	128	void arch_pre_smp_init(void)
130	{	129	{
131	}	130	}
132		131
133	void arch_post_smp_init(void)	132	void arch_post_smp_init(void)
134	{	133	{
135	}	134	}
136		135
137	/* Stack pointer saved when entering user mode */	136	/* Stack pointer saved when entering user mode */
138	/* TODO: How do we do it on SMP system???? */	137	/* TODO: How do we do it on SMP system???? */
139		138
140	/* Why the linker moves the variable 64K away in assembler	139	/* Why the linker moves the variable 64K away in assembler
141	* when not in .text section ????????	140	* when not in .text section ????????
142	*/	141	*/
143	__address supervisor_sp __attribute__ ((section (".text")));	142	__address supervisor_sp __attribute__ ((section (".text")));
144		143
145	void userspace(uspace_arg_t *kernel_uarg)	144	void userspace(uspace_arg_t *kernel_uarg)
146	{	145	{
147	/* EXL=1, UM=1, IE=1 */	146	/* EXL=1, UM=1, IE=1 */
148	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	147	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
149	cp0_status_um_bit \|	148	cp0_status_um_bit \|
150	cp0_status_ie_enabled_bit));	149	cp0_status_ie_enabled_bit));
151	cp0_epc_write((__address) kernel_uarg->uspace_entry);	150	cp0_epc_write((__address) kernel_uarg->uspace_entry);
152	userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),	151	userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
153	(__address) kernel_uarg->uspace_uarg,	152	(__address) kernel_uarg->uspace_uarg,
154	(__address) kernel_uarg->uspace_entry);	153	(__address) kernel_uarg->uspace_entry);
155	while (1)	154	while (1)
156	;	155	;
157	}	156	}
158		157
159	/** Perform mips32 specific tasks needed before the new task is run. */	158	/** Perform mips32 specific tasks needed before the new task is run. */
160	void before_task_runs_arch(void)	159	void before_task_runs_arch(void)
161	{	160	{
162	}	161	}
163		162
164	/** Perform mips32 specific tasks needed before the new thread is scheduled. */	163	/** Perform mips32 specific tasks needed before the new thread is scheduled. */
165	void before_thread_runs_arch(void)	164	void before_thread_runs_arch(void)
166	{	165	{
167	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];	166	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
168	}	167	}
169		168
170	void after_thread_ran_arch(void)	169	void after_thread_ran_arch(void)
171	{	170	{
172	}	171	}
173		172
174	/** Set thread-local-storage pointer	173	/** Set thread-local-storage pointer
175	*	174	*
176	* We have it currently in K1, it is	175	* We have it currently in K1, it is
177	* possible to have it separately in the future.	176	* possible to have it separately in the future.
178	*/	177	*/
179	__native sys_tls_set(__native addr)	178	__native sys_tls_set(__native addr)
180	{	179	{
181	return 0;	180	return 0;
182	}	181	}
183		182
184		183
185	/** @}	184	/** @}
186	*/	185	*/
187		186
188		187

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/mips32/src/mips32.c – Rev 1704 → 1705