WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/mips32/src/mips32.c


/*
 * Copyright (C) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <arch/asm.h>
#include <mm/as.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <proc/uarg.h>
#include <print.h>
#include <syscall/syscall.h>
#include <sysinfo/sysinfo.h>
 
#include <arch/interrupt.h>
#include <arch/drivers/arc.h>
#include <console/chardev.h>
#include <arch/debugger.h>
#include <genarch/fb/fb.h>
#include <debug.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE    8
 
#define TLB_EXC ((char *) 0x80000000)
#define NORM_EXC ((char *) 0x80000180)
#define CACHE_EXC ((char *) 0x80000100)
 
void arch_pre_main(void)
{
    /* Setup usermode */
    init.cnt = 6;
    init.tasks[0].addr = INIT_ADDRESS;
    init.tasks[0].size = INIT_SIZE;
    init.tasks[1].addr = INIT_ADDRESS + 0x100000;
    init.tasks[1].size = INIT_SIZE;
    init.tasks[2].addr = INIT_ADDRESS + 0x200000;
    init.tasks[2].size = INIT_SIZE;
    init.tasks[3].addr = INIT_ADDRESS + 0x300000;
    init.tasks[3].size = INIT_SIZE;
    init.tasks[4].addr = INIT_ADDRESS + 0x400000;
    init.tasks[4].size = INIT_SIZE;
    init.tasks[5].addr = INIT_ADDRESS + 0x500000;
    init.tasks[5].size = INIT_SIZE;
}
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
    arc_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
 
    interrupt_init();
    /*
     * Switch to BEV normal level so that exception vectors point to the kernel.
     * Clear the error level.
     */
    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
 
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
 
    /*
     * Unmask hardware clock interrupt.
     */
    cp0_unmask_int(TIMER_IRQ);
 
    console_init();
    debugger_init();
}
 
void arch_post_mm_init(void)
{
#ifdef CONFIG_FB
        fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer
#endif
        sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1);
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
}
 
/* Stack pointer saved when entering user mode */
/* TODO: How do we do it on SMP system???? */
 
/* Why the linker moves the variable 64K away in assembler
 * when not in .text section ????????
 */
__address supervisor_sp __attribute__ ((section (".text")));
 
void userspace(uspace_arg_t *kernel_uarg)
{
    /* EXL=1, UM=1, IE=1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
                          cp0_status_um_bit |
                          cp0_status_ie_enabled_bit));
    cp0_epc_write((__address) kernel_uarg->uspace_entry);
    userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
              (__address) kernel_uarg->uspace_uarg,
              (__address) kernel_uarg->uspace_entry);
    while (1)
        ;
}
 
/** Perform mips32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
}
 
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
}
 
/** Set thread-local-storage pointer
 *
 * We have it currently in K1, it is
 * possible to have it separately in the future.
 */
__native sys_tls_set(__native addr)
{
    return 0;
}
 
 

Rev 1537	Rev 1642
1	/*	1	/*
2	* Copyright (C) 2003-2004 Jakub Jermar	2	* Copyright (C) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29		29
30	#include <arch.h>	30	#include <arch.h>
31	#include <arch/cp0.h>	31	#include <arch/cp0.h>
32	#include <arch/exception.h>	32	#include <arch/exception.h>
33	#include <arch/asm.h>	33	#include <arch/asm.h>
34	#include <mm/as.h>	34	#include <mm/as.h>
35		35
36	#include <userspace.h>	36	#include <userspace.h>
37	#include <arch/console.h>	37	#include <arch/console.h>
38	#include <memstr.h>	38	#include <memstr.h>
39	#include <proc/thread.h>	39	#include <proc/thread.h>
40	#include <proc/uarg.h>	40	#include <proc/uarg.h>
41	#include <print.h>	41	#include <print.h>
42	#include <syscall/syscall.h>	42	#include <syscall/syscall.h>
-		43	#include <sysinfo/sysinfo.h>
43		44
44	#include <arch/interrupt.h>	45	#include <arch/interrupt.h>
45	#include <arch/drivers/arc.h>	46	#include <arch/drivers/arc.h>
46	#include <console/chardev.h>	47	#include <console/chardev.h>
47	#include <arch/debugger.h>	48	#include <arch/debugger.h>
48	#include <genarch/fb/fb.h>	49	#include <genarch/fb/fb.h>
-		50	#include <debug.h>
49		51
50	#include <arch/asm/regname.h>	52	#include <arch/asm/regname.h>
51		53
52	/* Size of the code jumping to the exception handler code	54	/* Size of the code jumping to the exception handler code
53	* - J+NOP	55	* - J+NOP
54	*/	56	*/
55	#define EXCEPTION_JUMP_SIZE 8	57	#define EXCEPTION_JUMP_SIZE 8
56		58
57	#define TLB_EXC ((char *) 0x80000000)	59	#define TLB_EXC ((char *) 0x80000000)
58	#define NORM_EXC ((char *) 0x80000180)	60	#define NORM_EXC ((char *) 0x80000180)
59	#define CACHE_EXC ((char *) 0x80000100)	61	#define CACHE_EXC ((char *) 0x80000100)
60		62
61	void arch_pre_main(void)	63	void arch_pre_main(void)
62	{	64	{
63	/* Setup usermode */	65	/* Setup usermode */
64	init.cnt = 6;	66	init.cnt = 6;
65	init.tasks[0].addr = INIT_ADDRESS;	67	init.tasks[0].addr = INIT_ADDRESS;
66	init.tasks[0].size = INIT_SIZE;	68	init.tasks[0].size = INIT_SIZE;
67	init.tasks[1].addr = INIT_ADDRESS + 0x100000;	69	init.tasks[1].addr = INIT_ADDRESS + 0x100000;
68	init.tasks[1].size = INIT_SIZE;	70	init.tasks[1].size = INIT_SIZE;
69	init.tasks[2].addr = INIT_ADDRESS + 0x200000;	71	init.tasks[2].addr = INIT_ADDRESS + 0x200000;
70	init.tasks[2].size = INIT_SIZE;	72	init.tasks[2].size = INIT_SIZE;
71	init.tasks[3].addr = INIT_ADDRESS + 0x300000;	73	init.tasks[3].addr = INIT_ADDRESS + 0x300000;
72	init.tasks[3].size = INIT_SIZE;	74	init.tasks[3].size = INIT_SIZE;
73	init.tasks[4].addr = INIT_ADDRESS + 0x400000;	75	init.tasks[4].addr = INIT_ADDRESS + 0x400000;
74	init.tasks[4].size = INIT_SIZE;	76	init.tasks[4].size = INIT_SIZE;
75	init.tasks[5].addr = INIT_ADDRESS + 0x500000;	77	init.tasks[5].addr = INIT_ADDRESS + 0x500000;
76	init.tasks[5].size = INIT_SIZE;	78	init.tasks[5].size = INIT_SIZE;
77	}	79	}
78		80
79	void arch_pre_mm_init(void)	81	void arch_pre_mm_init(void)
80	{	82	{
81	/* It is not assumed by default */	83	/* It is not assumed by default */
82	interrupts_disable();	84	interrupts_disable();
83		85
84	/* Initialize dispatch table */	86	/* Initialize dispatch table */
85	exception_init();	87	exception_init();
86	arc_init();	88	arc_init();
87		89
88	/* Copy the exception vectors to the right places */	90	/* Copy the exception vectors to the right places */
89	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);	91	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
90	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);	92	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
91	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);	93	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
92		94
93	interrupt_init();	95	interrupt_init();
94	/*	96	/*
95	* Switch to BEV normal level so that exception vectors point to the kernel.	97	* Switch to BEV normal level so that exception vectors point to the kernel.
96	* Clear the error level.	98	* Clear the error level.
97	*/	99	*/
98	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));	100	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));
99		101
100	/*	102	/*
101	* Mask all interrupts	103	* Mask all interrupts
102	*/	104	*/
103	cp0_mask_all_int();	105	cp0_mask_all_int();
104		106
105	/*	107	/*
106	* Unmask hardware clock interrupt.	108	* Unmask hardware clock interrupt.
107	*/	109	*/
108	cp0_unmask_int(TIMER_IRQ);	110	cp0_unmask_int(TIMER_IRQ);
109		111
110	console_init();	112	console_init();
111	debugger_init();	113	debugger_init();
112	}	114	}
113		115
114	void arch_post_mm_init(void)	116	void arch_post_mm_init(void)
115	{	117	{
116	#ifdef CONFIG_FB	118	#ifdef CONFIG_FB
117	fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer	119	fb_init(0x12000000, 640, 480, 24, 1920); // gxemul framebuffer
118	#endif	120	#endif
-		121	sysinfo_set_item_val("machine." STRING(MACHINE),NULL,1);
119	}	122	}
120		123
121	void arch_pre_smp_init(void)	124	void arch_pre_smp_init(void)
122	{	125	{
123	}	126	}
124		127
125	void arch_post_smp_init(void)	128	void arch_post_smp_init(void)
126	{	129	{
127	}	130	}
128		131
129	/* Stack pointer saved when entering user mode */	132	/* Stack pointer saved when entering user mode */
130	/* TODO: How do we do it on SMP system???? */	133	/* TODO: How do we do it on SMP system???? */
131		134
132	/* Why the linker moves the variable 64K away in assembler	135	/* Why the linker moves the variable 64K away in assembler
133	* when not in .text section ????????	136	* when not in .text section ????????
134	*/	137	*/
135	__address supervisor_sp __attribute__ ((section (".text")));	138	__address supervisor_sp __attribute__ ((section (".text")));
136		139
137	void userspace(uspace_arg_t *kernel_uarg)	140	void userspace(uspace_arg_t *kernel_uarg)
138	{	141	{
139	/* EXL=1, UM=1, IE=1 */	142	/* EXL=1, UM=1, IE=1 */
140	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	143	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
141	cp0_status_um_bit \|	144	cp0_status_um_bit \|
142	cp0_status_ie_enabled_bit));	145	cp0_status_ie_enabled_bit));
143	cp0_epc_write((__address) kernel_uarg->uspace_entry);	146	cp0_epc_write((__address) kernel_uarg->uspace_entry);
144	userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),	147	userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
145	(__address) kernel_uarg->uspace_uarg,	148	(__address) kernel_uarg->uspace_uarg,
146	(__address) kernel_uarg->uspace_entry);	149	(__address) kernel_uarg->uspace_entry);
147	while (1)	150	while (1)
148	;	151	;
149	}	152	}
150		153
151	/** Perform mips32 specific tasks needed before the new task is run. */	154	/** Perform mips32 specific tasks needed before the new task is run. */
152	void before_task_runs_arch(void)	155	void before_task_runs_arch(void)
153	{	156	{
154	}	157	}
155		158
156	/** Perform mips32 specific tasks needed before the new thread is scheduled. */	159	/** Perform mips32 specific tasks needed before the new thread is scheduled. */
157	void before_thread_runs_arch(void)	160	void before_thread_runs_arch(void)
158	{	161	{
159	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];	162	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
160	}	163	}
161		164
162	void after_thread_ran_arch(void)	165	void after_thread_ran_arch(void)
163	{	166	{
164	}	167	}
165		168
166	/** Set thread-local-storage pointer	169	/** Set thread-local-storage pointer
167	*	170	*
168	* We have it currently in K1, it is	171	* We have it currently in K1, it is
169	* possible to have it separately in the future.	172	* possible to have it separately in the future.
170	*/	173	*/
171	__native sys_tls_set(__native addr)	174	__native sys_tls_set(__native addr)
172	{	175	{
173	return 0;	176	return 0;
174	}	177	}
175		178
176		179

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/mips32/src/mips32.c – Rev 1537 → 1642