Rev 1096 | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 1096 | Rev 1702 | ||
|---|---|---|---|
| 1 | /* |
1 | /* |
| 2 | * Copyright (C) 2005 Jakub Vana |
2 | * Copyright (C) 2005 Jakub Vana |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| - | 27 | */ |
|
| - | 28 | ||
| - | 29 | /** @addtogroup mips32 |
|
| - | 30 | * @{ |
|
| - | 31 | */ |
|
| - | 32 | /** @file |
|
| 27 | * |
33 | * |
| 28 | */ |
34 | */ |
| 29 | 35 | ||
| 30 | #include <fpu_context.h> |
36 | #include <fpu_context.h> |
| 31 | #include <arch.h> |
37 | #include <arch.h> |
| 32 | #include <arch/cp0.h> |
38 | #include <arch/cp0.h> |
| 33 | #include <proc/thread.h> |
39 | #include <proc/thread.h> |
| 34 | 40 | ||
| 35 | void fpu_disable(void) |
41 | void fpu_disable(void) |
| 36 | { |
42 | { |
| 37 | #ifdef ARCH_HAS_FPU |
43 | #ifdef ARCH_HAS_FPU |
| 38 | cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit); |
44 | cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit); |
| 39 | #endif |
45 | #endif |
| 40 | } |
46 | } |
| 41 | 47 | ||
| 42 | void fpu_enable(void) |
48 | void fpu_enable(void) |
| 43 | { |
49 | { |
| 44 | #ifdef ARCH_HAS_FPU |
50 | #ifdef ARCH_HAS_FPU |
| 45 | cp0_status_write(cp0_status_read() | cp0_status_fpu_bit); |
51 | cp0_status_write(cp0_status_read() | cp0_status_fpu_bit); |
| 46 | #endif |
52 | #endif |
| 47 | } |
53 | } |
| 48 | 54 | ||
| 49 | void fpu_init() |
55 | void fpu_init() |
| 50 | { |
56 | { |
| 51 | /* TODO: Zero all registers */ |
57 | /* TODO: Zero all registers */ |
| 52 | } |
58 | } |
| - | 59 | ||
| - | 60 | /** @} |
|
| - | 61 | */ |
|
| - | 62 | ||
| 53 | 63 | ||