Subversion Repositories HelenOS-historic

Rev

Rev 879 | Rev 901 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 879 Rev 893
Line 24... Line 24...
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
#
27
#
28
 
28
 
29
 
-
 
30
#include <arch/register.h>
29
#include <arch/register.h>
31
#include <arch/mm/page.h>
30
#include <arch/mm/page.h>
32
#include <arch/mm/asid.h>
31
#include <arch/mm/asid.h>
33
#include <mm/asid.h>
32
#include <mm/asid.h>
34
 
33
 
35
 
-
 
36
#define RR_MASK (0xFFFFFFFF00000002)
34
#define RR_MASK (0xFFFFFFFF00000002)
37
#define RID_SHIFT 8
35
#define RID_SHIFT 8
38
#define PS_SHIFT 2
36
#define PS_SHIFT 2
39
 
37
 
40
 
-
 
41
#define KERNEL_TRANSLATION_I 0x0010000000000661
38
#define KERNEL_TRANSLATION_I 0x0010000000000661
42
#define KERNEL_TRANSLATION_D 0x0010000000000661
39
#define KERNEL_TRANSLATION_D 0x0010000000000661
43
 
40
 
44
 
-
 
45
.section K_TEXT_START
41
.section K_TEXT_START
46
 
42
 
47
.global kernel_image_start
43
.global kernel_image_start
48
 
44
 
49
stack0:
45
stack0:
50
kernel_image_start:
46
kernel_image_start:
51
	.auto
47
	.auto
52
 
48
 
53
	#Fill TR.i and TR.d using Region Register #VRN_KERNEL
49
	# Fill TR.i and TR.d using Region Register #VRN_KERNEL
54
 
50
 
55
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
51
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
56
	mov r9=rr[r8]
52
	mov r9=rr[r8]
57
	movl r10=(RR_MASK)
53
	movl r10=(RR_MASK)
58
	and r9=r10,r9
54
	and r9=r10,r9
59
	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
55
	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
60
	or  r9=r10,r9
56
	or  r9=r10,r9
61
	mov rr[r8]=r9
57
	mov rr[r8]=r9
62
 
58
 
63
 
-
 
64
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
59
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
65
	mov cr.ifa=r8
60
	mov cr.ifa=r8
66
	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
61
	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
67
	mov cr.itir=r10
62
	mov cr.itir=r10
68
	movl r10=(KERNEL_TRANSLATION_I)
63
	movl r10=(KERNEL_TRANSLATION_I)
69
	itr.i itr[r0]=r10
64
	itr.i itr[r0]=r10
70
 
-
 
71
	movl r10=(KERNEL_TRANSLATION_D)
65
	movl r10=(KERNEL_TRANSLATION_D)
72
	itr.d dtr[r0]=r10
66
	itr.d dtr[r0]=r10
73
 
67
 
74
 
-
 
75
	# initialize PSR
68
	# initialize PSR
76
	mov psr.l = r0
69
	mov psr.l = r0
77
	srlz.i
70
	srlz.i
78
	srlz.d
71
	srlz.d
79
	movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK)  /*Enable paging*/
72
	movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK)  /* Enable paging */
80
	mov r9=psr
73
	mov r9=psr
81
	or r10=r10,r9
74
	or r10=r10,r9
82
	mov cr.ipsr=r10
75
	mov cr.ipsr=r10
83
	mov cr.ifs=r0
76
	mov cr.ifs=r0
84
	movl r8=paging_start
77
	movl r8=paging_start
85
	mov cr.iip=r8
78
	mov cr.iip=r8
86
	srlz.d
79
	srlz.d
87
	srlz.i
80
	srlz.i
88
.explicit
-
 
89
 
81
 
-
 
82
	.explicit
-
 
83
	/*
90
	/*Return from interupt is only the way how to fill upper half word of PSR*/
84
	 * Return From Interupt is the only the way to fill upper half word of PSR.
-
 
85
	 */
91
	{rfi;;}
86
	rfi;;
92
	{nop 0;;}
87
	{nop 0;;}
93
	{nop 0;;}
88
	{nop 0;;}
94
	{nop 0;;}
89
	{nop 0;;}
95
	{nop 0;;}
90
	{nop 0;;}
96
	{nop 0;;}
91
	{nop 0;;}
97
	{nop 0;;}
92
	{nop 0;;}
98
	{nop 0;;}
93
	{nop 0;;}
99
	{nop 0;;}
94
	{nop 0;;}
100
 
95
 
101
.global paging_start
96
.global paging_start
102
	/*Now we are paging*/
-
 
103
paging_start:
97
paging_start:
-
 
98
 
-
 
99
	/*
-
 
100
	 * Now we are paging.
-
 
101
	 */
-
 
102
 
104
	{nop 0;;}
103
	{nop 0;;}
105
	{nop 0;;}
104
	{nop 0;;}
106
	{nop 0;;}
105
	{nop 0;;}
107
	{nop 0;;}
106
	{nop 0;;}
108
	{nop 0;;}
107
	{nop 0;;}
109
	{nop 0;;}
108
	{nop 0;;}
110
	{nop 0;;}
109
	{nop 0;;}
111
	{nop 0;;}
110
	{nop 0;;}
112
 
111
 
113
.auto
-
 
114
	
-
 
115
	# switch to register bank 1
112
	# switch to register bank 1
116
	bsw.1
113
	bsw.1
117
	
114
	
118
	# initialize register stack
115
	# initialize register stack
119
	mov ar.rsc = r0
116
	mov ar.rsc = r0
120
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
117
	movl r8=(VRN_KERNEL<<VRN_SHIFT) ;;
121
	mov ar.bspstore = r8
118
	mov ar.bspstore = r8
122
	loadrs
119
	loadrs
123
 
120
 
124
	.explicit
-
 
125
	# initialize memory stack to some sane value
121
	# initialize memory stack to some sane value
126
	movl r12 = stack0;;
122
	movl r12 = stack0;;
127
	
123
	
128
	add r12 = - 16, r12	/* allocate a scratch area on the stack */
124
	add r12 = - 16, r12	/* allocate a scratch area on the stack */
129
 
125
 
130
	# initialize gp (Global Pointer) register
126
	# initialize gp (Global Pointer) register
131
	movl r1 = _hardcoded_load_address	;;
127
	movl r1 = _hardcoded_load_address	;;
132
 
128
 
133
	
-
 
134
 
-
 
135
	#
129
	/*
136
	# Initialize hardcoded_* variables.
130
	 * Initialize hardcoded_* variables.
137
	#
131
	 */
138
	movl r14 = _hardcoded_ktext_size
132
	movl r14 = _hardcoded_ktext_size
139
	movl r15 = _hardcoded_kdata_size
133
	movl r15 = _hardcoded_kdata_size
140
	movl r16 = _hardcoded_load_address
134
	movl r16 = _hardcoded_load_address
141
	addl r17 = @gprel(hardcoded_ktext_size), gp
135
	addl r17 = @gprel(hardcoded_ktext_size), gp
142
	addl r18 = @gprel(hardcoded_kdata_size), gp
136
	addl r18 = @gprel(hardcoded_kdata_size), gp
Line 144... Line 138...
144
	;;
138
	;;
145
	st8 [r17] = r14
139
	st8 [r17] = r14
146
	st8 [r18] = r15
140
	st8 [r18] = r15
147
	st8 [r19] = r16
141
	st8 [r19] = r16
148
 
142
 
149
 
-
 
150
.auto
-
 
151
	
-
 
152
	movl r18=main_bsp 
143
	movl r18=main_bsp ;;
153
	mov b1=r18
144
	mov b1=r18 ;;
154
	br.call.sptk.many b0=b1
145
	br.call.sptk.many b0=b1
155
 
146
 
156
 
-
 
157
0:
147
0:
158
	br 0b
148
	br 0b