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/** Partitioning of bank 0 registers. */
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/** Partitioning of bank 0 registers. */
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#define R_OFFS 		r16
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#define R_OFFS 		r16
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#define R_HANDLER	r17
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#define R_HANDLER	r17
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#define R_RET		r18
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#define R_RET		r18
- 
 
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#define R_KSTACK_BSP	r22	/* keep in sync with before_thread_runs_arch() */
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#define R_KSTACK	r23	/* keep in sync with before_thread_runs_arch() */
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#define R_KSTACK	r23	/* keep in sync with before_thread_runs_arch() */
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/** Heavyweight interrupt handler
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/** Heavyweight interrupt handler
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 *
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 *
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 * This macro roughly follows steps from 1 to 19 described in
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 * This macro roughly follows steps from 1 to 19 described in
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 *
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 *
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 * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions).
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 * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions).
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 * This goal is achieved by using procedure calls after RSE becomes operational.
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 * This goal is achieved by using procedure calls after RSE becomes operational.
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 *
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 *
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 * Some steps are skipped (enabling and disabling interrupts).
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 * Some steps are skipped (enabling and disabling interrupts).
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 * Some steps are not fully supported yet (e.g. interruptions
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 * Some steps are not fully supported yet (e.g. dealing with floating-point
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 * from userspace and floating-point context).
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 * context).
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 *
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 *
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 * @param offs Offset from the beginning of IVT.
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 * @param offs Offset from the beginning of IVT.
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 * @param handler Interrupt handler address.
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 * @param handler Interrupt handler address.
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 */
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 */
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.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
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.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
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    /* 3. switch to kernel memory stack */
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    /* 3. switch to kernel memory stack */
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    	mov r30 = cr.ipsr
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    	mov r30 = cr.ipsr
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	shr.u r31 = r12, VRN_SHIFT ;;
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	shr.u r31 = r12, VRN_SHIFT ;;
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	shr.u r30 = r30, PSR_CPL_SHIFT ;;
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	and r30 = PSR_CPL_MASK_SHIFTED, r30 ;;
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	/*
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	/*
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	 * Set p6 to true if the stack register references kernel address space.
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	 * Set p3 to true if the interrupted context executed in kernel mode.
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	 * Set p7 to false if the stack register doesn't reference kernel address space.
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	 * Set p4 to false if the interrupted context didn't execute in kernel mode.
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	 */
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	 */
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	cmp.eq p6, p7 = VRN_KERNEL, r31 ;;
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	cmp.eq p3, p4 = r30, r0 ;;
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- 
 
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	(p6) shr.u r30 = r30, PSR_CPL_SHIFT ;;
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	(p6) and r30 = PSR_CPL_MASK_SHIFTED, r30 ;;
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	cmp.eq p1, p2 = r30, r0 ;;	/* remember IPSR setting in p1 and p2 */
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	/*
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	/*
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	 * Set p6 to true if the interrupted context executed in kernel mode.
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	 * Set p3 to true if the stack register references kernel address space.
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	 * Set p7 to false if the interrupted context didn't execute in kernel mode.
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	 * Set p4 to false if the stack register doesn't reference kernel address space.
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	 */
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	 */
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	(p6) cmp.eq p6, p7 = r30, r0 ;;
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	(p3) cmp.eq p3, p4 = VRN_KERNEL, r31 ;;
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	/*
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	/*
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	 * Now, p7 is true iff the stack needs to be switched to kernel stack.
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	 * Now, p4 is true iff the stack needs to be switched to kernel stack.
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	 */
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	 */
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	mov r30 = r12
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	mov r30 = r12
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	(p7) mov r12 = R_KSTACK ;;
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	(p4) mov r12 = R_KSTACK ;;
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	add r31 = -STACK_FRAME_BIAS, r12 ;;
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	add r31 = -STACK_FRAME_BIAS, r12 ;;
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	add r12 = -STACK_FRAME_SIZE, r12
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	add r12 = -STACK_FRAME_SIZE, r12
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    /* 4. save registers in bank 0 into memory stack */
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    /* 4. save registers in bank 0 into memory stack */
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	mov ar.rsc = r30 ;;	/* place RSE in enforced lazy mode */
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	mov ar.rsc = r30 ;;		/* place RSE in enforced lazy mode */
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	mov r27 = ar.rnat
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	mov r27 = ar.rnat
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	mov r28 = ar.bspstore ;;
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	mov r28 = ar.bspstore ;;
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- 
 
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	/*
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	 * Inspect BSPSTORE to figure out whether it is necessary to switch to kernel BSPSTORE.
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	 */
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	/* assume kernel backing store */
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	(p1) shr.u r30 = r28, VRN_SHIFT ;;
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	(p1) cmp.eq p1, p2 = VRN_KERNEL, r30 ;;
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	/*
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	 * If BSPSTORE needs to be switched, p1 is false and p2 is true.
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	 */
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	(p1) mov r30 = r28
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	(p2) mov r30 = R_KSTACK_BSP ;;
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	mov ar.bspstore = r28 ;;
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	(p2) mov ar.bspstore = r30 ;;
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	mov r29 = ar.bsp
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	mov r29 = ar.bsp
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	st8 [r31] = r27, -8 ;;	/* save ar.rnat */
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	st8 [r31] = r27, -8 ;;		/* save ar.rnat */
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	st8 [r31] = r28, -8 ;;	/* save new value written to ar.bspstore */
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	st8 [r31] = r30, -8 ;;		/* save new value written to ar.bspstore */
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	st8 [r31] = r28, -8 ;;	/* save ar.bspstore */
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	st8 [r31] = r28, -8 ;;		/* save ar.bspstore */
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	st8 [r31] = r29, -8 	/* save ar.bsp */
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	st8 [r31] = r29, -8 		/* save ar.bsp */
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	mov ar.rsc = r24	/* restore RSE's setting */
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	mov ar.rsc = r24		/* restore RSE's setting */
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