WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/src/interrupt.c


/*
 * Copyright (C) 2005 Jakub Jermar
 * Copyright (C) 2005 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64interrupt
 
 * @{
 */
/** @file
 
 */
 
#include <arch/interrupt.h>
#include <panic.h>
#include <print.h>
#include <console/console.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <arch/register.h>
#include <arch/drivers/it.h>
#include <arch.h>
#include <symtab.h>
#include <debug.h>
#include <syscall/syscall.h>
#include <print.h>
#include <proc/scheduler.h>
#include <ipc/sysipc.h>
#include <ipc/irq.h>
#include <ipc/ipc.h>
#include <interrupt.h>
 
 
#define VECTORS_64_BUNDLE   20
#define VECTORS_16_BUNDLE   48
#define VECTORS_16_BUNDLE_START 0x5000
#define VECTOR_MAX      0x7f00
 
#define BUNDLE_SIZE     16
 
 
char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
    "VHPT Translation vector",
    "Instruction TLB vector",
    "Data TLB vector",
    "Alternate Instruction TLB vector",
    "Alternate Data TLB vector",
    "Data Nested TLB vector",
    "Instruction Key Miss vector",
    "Data Key Miss vector",
    "Dirty-Bit vector",
    "Instruction Access-Bit vector",
    "Data Access-Bit vector"
    "Break Instruction vector",
    "External Interrupt vector"
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
    "Page Not Present vector",
    "Key Permission vector",
    "Instruction Access rights vector",
    "Data Access Rights vector",
    "General Exception vector",
    "Disabled FP-Register vector",
    "NaT Consumption vector",
    "Speculation vector",
    "Reserved",
    "Debug vector",
    "Unaligned Reference vector",
    "Unsupported Data Reference vector",
    "Floating-point Fault vector",
    "Floating-point Trap vector",
    "Lower-Privilege Transfer Trap vector",
    "Taken Branch Trap vector",
    "Single STep Trap vector",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "IA-32 Exception vector",
    "IA-32 Intercept vector",
    "IA-32 Interrupt vector",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
static char *vector_to_string(__u16 vector);
static void dump_interrupted_context(istate_t *istate);
 
char *vector_to_string(__u16 vector)
{
    ASSERT(vector <= VECTOR_MAX);
   
    if (vector >= VECTORS_16_BUNDLE_START)
        return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
    else
        return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
}
 
void dump_interrupted_context(istate_t *istate)
{
    char *ifa, *iipa, *iip;
 
    ifa = get_symtab_entry(istate->cr_ifa);
    iipa = get_symtab_entry(istate->cr_iipa);
    iip = get_symtab_entry(istate->cr_iip);
 
    putchar('\n');
    printf("Interrupted context dump:\n");
    printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
    printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);
    printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);
    printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
   
    printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);
    printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
    printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
}
 
void general_exception(__u64 vector, istate_t *istate)
{
    char *desc = "";
 
    switch (istate->cr_isr.ge_code) {
        case GE_ILLEGALOP:
        desc = "Illegal Operation fault";
        break;
        case GE_PRIVOP:
        desc = "Privileged Operation fault";
        break;
        case GE_PRIVREG:
        desc = "Privileged Register fault";
        break;
        case GE_RESREGFLD:
        desc = "Reserved Register/Field fault";
        break;
        case GE_DISBLDISTRAN:
        desc = "Disabled Instruction Set Transition fault";
        break;
        case GE_ILLEGALDEP:
        desc = "Illegal Dependency fault";
        break;
        default:
            desc = "unknown";
        break;
    }
 
    fault_if_from_uspace(istate, "General Exception (%s)", desc);
 
    dump_interrupted_context(istate);
    panic("General Exception (%s)\n", desc);
}
 
void fpu_enable(void);
 
void disabled_fp_register(__u64 vector, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY 
    scheduler_fpu_lazy_request();  
#else
    fault_if_from_uspace(istate, "Interruption: %#hx (%s)", (__u16) vector, vector_to_string(vector));
    dump_interrupted_context(istate);
    panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
#endif
}
 
 
void nop_handler(__u64 vector, istate_t *istate)
{
}
 
 
 
/** Handle syscall. */
int break_instruction(__u64 vector, istate_t *istate)
{
    /*
     * Move to next instruction after BREAK.
     */
    if (istate->cr_ipsr.ri == 2) {
        istate->cr_ipsr.ri = 0;
        istate->cr_iip += 16;
    } else {
        istate->cr_ipsr.ri++;
    }
 
    if (istate->in4 < SYSCALL_END)
        return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
    else
        panic("Undefined syscall %d", istate->in4);
       
    return -1;
}
 
void universal_handler(__u64 vector, istate_t *istate)
{
    fault_if_from_uspace(istate,"Interruption: %#hx (%s)\n",(__u16) vector, vector_to_string(vector));
    dump_interrupted_context(istate);
    panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
}
 
void external_interrupt(__u64 vector, istate_t *istate)
{
    cr_ivr_t ivr;
   
    ivr.value = ivr_read();
    srlz_d();
 
    switch(ivr.vector) {
        case INTERRUPT_TIMER:
        it_interrupt();
            break;
        case INTERRUPT_SPURIOUS:
            printf("cpu%d: spurious interrupt\n", CPU->id);
        break;
        default:
        panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
        break;
    }
}
 
void virtual_interrupt(__u64 irq,void *param)
{
    switch(irq) {
        case IRQ_KBD:
            if(kbd_uspace) ipc_irq_send_notif(irq);
            break;
        default:
            panic("\nUnhandled Virtual Interrupt request %d\n", irq);
        break;
    }
}
 
/* Reregister irq to be IPC-ready */
void irq_ipc_bind_arch(__native irq)
{
    if(irq==IRQ_KBD) {
        kbd_uspace=1;
        return;
    }
    return;
    panic("not implemented\n");
    /* TODO */
}
 
/** @}
 */
 
 

Rev 1703	Rev 1705
1	/*	1	/*
2	* Copyright (C) 2005 Jakub Jermar	2	* Copyright (C) 2005 Jakub Jermar
3	* Copyright (C) 2005 Jakub Vana	3	* Copyright (C) 2005 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	/** @addtogroup ia64interrupt ia64	30	/** @addtogroup ia64interrupt
31	* @ingroup interrupt	-
32	* @{	31	* @{
33	*/	32	*/
34	/** @file	33	/** @file
35	*	-
36	*/	34	*/
37		35
38	#include <arch/interrupt.h>	36	#include <arch/interrupt.h>
39	#include <panic.h>	37	#include <panic.h>
40	#include <print.h>	38	#include <print.h>
41	#include <console/console.h>	39	#include <console/console.h>
42	#include <arch/types.h>	40	#include <arch/types.h>
43	#include <arch/asm.h>	41	#include <arch/asm.h>
44	#include <arch/barrier.h>	42	#include <arch/barrier.h>
45	#include <arch/register.h>	43	#include <arch/register.h>
46	#include <arch/drivers/it.h>	44	#include <arch/drivers/it.h>
47	#include <arch.h>	45	#include <arch.h>
48	#include <symtab.h>	46	#include <symtab.h>
49	#include <debug.h>	47	#include <debug.h>
50	#include <syscall/syscall.h>	48	#include <syscall/syscall.h>
51	#include <print.h>	49	#include <print.h>
52	#include <proc/scheduler.h>	50	#include <proc/scheduler.h>
53	#include <ipc/sysipc.h>	51	#include <ipc/sysipc.h>
54	#include <ipc/irq.h>	52	#include <ipc/irq.h>
55	#include <ipc/ipc.h>	53	#include <ipc/ipc.h>
56	#include <interrupt.h>	54	#include <interrupt.h>
57		55
58		56
59	#define VECTORS_64_BUNDLE 20	57	#define VECTORS_64_BUNDLE 20
60	#define VECTORS_16_BUNDLE 48	58	#define VECTORS_16_BUNDLE 48
61	#define VECTORS_16_BUNDLE_START 0x5000	59	#define VECTORS_16_BUNDLE_START 0x5000
62	#define VECTOR_MAX 0x7f00	60	#define VECTOR_MAX 0x7f00
63		61
64	#define BUNDLE_SIZE 16	62	#define BUNDLE_SIZE 16
65		63
66		64
67	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {	65	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
68	"VHPT Translation vector",	66	"VHPT Translation vector",
69	"Instruction TLB vector",	67	"Instruction TLB vector",
70	"Data TLB vector",	68	"Data TLB vector",
71	"Alternate Instruction TLB vector",	69	"Alternate Instruction TLB vector",
72	"Alternate Data TLB vector",	70	"Alternate Data TLB vector",
73	"Data Nested TLB vector",	71	"Data Nested TLB vector",
74	"Instruction Key Miss vector",	72	"Instruction Key Miss vector",
75	"Data Key Miss vector",	73	"Data Key Miss vector",
76	"Dirty-Bit vector",	74	"Dirty-Bit vector",
77	"Instruction Access-Bit vector",	75	"Instruction Access-Bit vector",
78	"Data Access-Bit vector"	76	"Data Access-Bit vector"
79	"Break Instruction vector",	77	"Break Instruction vector",
80	"External Interrupt vector"	78	"External Interrupt vector"
81	"Reserved",	79	"Reserved",
82	"Reserved",	80	"Reserved",
83	"Reserved",	81	"Reserved",
84	"Reserved",	82	"Reserved",
85	"Reserved",	83	"Reserved",
86	"Reserved",	84	"Reserved",
87	"Reserved"	85	"Reserved"
88	};	86	};
89		87
90	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {	88	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
91	"Page Not Present vector",	89	"Page Not Present vector",
92	"Key Permission vector",	90	"Key Permission vector",
93	"Instruction Access rights vector",	91	"Instruction Access rights vector",
94	"Data Access Rights vector",	92	"Data Access Rights vector",
95	"General Exception vector",	93	"General Exception vector",
96	"Disabled FP-Register vector",	94	"Disabled FP-Register vector",
97	"NaT Consumption vector",	95	"NaT Consumption vector",
98	"Speculation vector",	96	"Speculation vector",
99	"Reserved",	97	"Reserved",
100	"Debug vector",	98	"Debug vector",
101	"Unaligned Reference vector",	99	"Unaligned Reference vector",
102	"Unsupported Data Reference vector",	100	"Unsupported Data Reference vector",
103	"Floating-point Fault vector",	101	"Floating-point Fault vector",
104	"Floating-point Trap vector",	102	"Floating-point Trap vector",
105	"Lower-Privilege Transfer Trap vector",	103	"Lower-Privilege Transfer Trap vector",
106	"Taken Branch Trap vector",	104	"Taken Branch Trap vector",
107	"Single STep Trap vector",	105	"Single STep Trap vector",
108	"Reserved",	106	"Reserved",
109	"Reserved",	107	"Reserved",
110	"Reserved",	108	"Reserved",
111	"Reserved",	109	"Reserved",
112	"Reserved",	110	"Reserved",
113	"Reserved",	111	"Reserved",
114	"Reserved",	112	"Reserved",
115	"Reserved",	113	"Reserved",
116	"IA-32 Exception vector",	114	"IA-32 Exception vector",
117	"IA-32 Intercept vector",	115	"IA-32 Intercept vector",
118	"IA-32 Interrupt vector",	116	"IA-32 Interrupt vector",
119	"Reserved",	117	"Reserved",
120	"Reserved",	118	"Reserved",
121	"Reserved"	119	"Reserved"
122	};	120	};
123		121
124	static char *vector_to_string(__u16 vector);	122	static char *vector_to_string(__u16 vector);
125	static void dump_interrupted_context(istate_t *istate);	123	static void dump_interrupted_context(istate_t *istate);
126		124
127	char *vector_to_string(__u16 vector)	125	char *vector_to_string(__u16 vector)
128	{	126	{
129	ASSERT(vector <= VECTOR_MAX);	127	ASSERT(vector <= VECTOR_MAX);
130		128
131	if (vector >= VECTORS_16_BUNDLE_START)	129	if (vector >= VECTORS_16_BUNDLE_START)
132	return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];	130	return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
133	else	131	else
134	return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];	132	return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
135	}	133	}
136		134
137	void dump_interrupted_context(istate_t *istate)	135	void dump_interrupted_context(istate_t *istate)
138	{	136	{
139	char ifa, iipa, *iip;	137	char ifa, iipa, *iip;
140		138
141	ifa = get_symtab_entry(istate->cr_ifa);	139	ifa = get_symtab_entry(istate->cr_ifa);
142	iipa = get_symtab_entry(istate->cr_iipa);	140	iipa = get_symtab_entry(istate->cr_iipa);
143	iip = get_symtab_entry(istate->cr_iip);	141	iip = get_symtab_entry(istate->cr_iip);
144		142
145	putchar('\n');	143	putchar('\n');
146	printf("Interrupted context dump:\n");	144	printf("Interrupted context dump:\n");
147	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);	145	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
148	printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);	146	printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);
149	printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);	147	printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);
150	printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);	148	printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
151		149
152	printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);	150	printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);
153	printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);	151	printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
154	printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);	152	printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
155	}	153	}
156		154
157	void general_exception(__u64 vector, istate_t *istate)	155	void general_exception(__u64 vector, istate_t *istate)
158	{	156	{
159	char *desc = "";	157	char *desc = "";
160		158
161	switch (istate->cr_isr.ge_code) {	159	switch (istate->cr_isr.ge_code) {
162	case GE_ILLEGALOP:	160	case GE_ILLEGALOP:
163	desc = "Illegal Operation fault";	161	desc = "Illegal Operation fault";
164	break;	162	break;
165	case GE_PRIVOP:	163	case GE_PRIVOP:
166	desc = "Privileged Operation fault";	164	desc = "Privileged Operation fault";
167	break;	165	break;
168	case GE_PRIVREG:	166	case GE_PRIVREG:
169	desc = "Privileged Register fault";	167	desc = "Privileged Register fault";
170	break;	168	break;
171	case GE_RESREGFLD:	169	case GE_RESREGFLD:
172	desc = "Reserved Register/Field fault";	170	desc = "Reserved Register/Field fault";
173	break;	171	break;
174	case GE_DISBLDISTRAN:	172	case GE_DISBLDISTRAN:
175	desc = "Disabled Instruction Set Transition fault";	173	desc = "Disabled Instruction Set Transition fault";
176	break;	174	break;
177	case GE_ILLEGALDEP:	175	case GE_ILLEGALDEP:
178	desc = "Illegal Dependency fault";	176	desc = "Illegal Dependency fault";
179	break;	177	break;
180	default:	178	default:
181	desc = "unknown";	179	desc = "unknown";
182	break;	180	break;
183	}	181	}
184		182
185	fault_if_from_uspace(istate, "General Exception (%s)", desc);	183	fault_if_from_uspace(istate, "General Exception (%s)", desc);
186		184
187	dump_interrupted_context(istate);	185	dump_interrupted_context(istate);
188	panic("General Exception (%s)\n", desc);	186	panic("General Exception (%s)\n", desc);
189	}	187	}
190		188
191	void fpu_enable(void);	189	void fpu_enable(void);
192		190
193	void disabled_fp_register(__u64 vector, istate_t *istate)	191	void disabled_fp_register(__u64 vector, istate_t *istate)
194	{	192	{
195	#ifdef CONFIG_FPU_LAZY	193	#ifdef CONFIG_FPU_LAZY
196	scheduler_fpu_lazy_request();	194	scheduler_fpu_lazy_request();
197	#else	195	#else
198	fault_if_from_uspace(istate, "Interruption: %#hx (%s)", (__u16) vector, vector_to_string(vector));	196	fault_if_from_uspace(istate, "Interruption: %#hx (%s)", (__u16) vector, vector_to_string(vector));
199	dump_interrupted_context(istate);	197	dump_interrupted_context(istate);
200	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));	198	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
201	#endif	199	#endif
202	}	200	}
203		201
204		202
205	void nop_handler(__u64 vector, istate_t *istate)	203	void nop_handler(__u64 vector, istate_t *istate)
206	{	204	{
207	}	205	}
208		206
209		207
210		208
211	/** Handle syscall. */	209	/** Handle syscall. */
212	int break_instruction(__u64 vector, istate_t *istate)	210	int break_instruction(__u64 vector, istate_t *istate)
213	{	211	{
214	/*	212	/*
215	* Move to next instruction after BREAK.	213	* Move to next instruction after BREAK.
216	*/	214	*/
217	if (istate->cr_ipsr.ri == 2) {	215	if (istate->cr_ipsr.ri == 2) {
218	istate->cr_ipsr.ri = 0;	216	istate->cr_ipsr.ri = 0;
219	istate->cr_iip += 16;	217	istate->cr_iip += 16;
220	} else {	218	} else {
221	istate->cr_ipsr.ri++;	219	istate->cr_ipsr.ri++;
222	}	220	}
223		221
224	if (istate->in4 < SYSCALL_END)	222	if (istate->in4 < SYSCALL_END)
225	return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);	223	return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
226	else	224	else
227	panic("Undefined syscall %d", istate->in4);	225	panic("Undefined syscall %d", istate->in4);
228		226
229	return -1;	227	return -1;
230	}	228	}
231		229
232	void universal_handler(__u64 vector, istate_t *istate)	230	void universal_handler(__u64 vector, istate_t *istate)
233	{	231	{
234	fault_if_from_uspace(istate,"Interruption: %#hx (%s)\n",(__u16) vector, vector_to_string(vector));	232	fault_if_from_uspace(istate,"Interruption: %#hx (%s)\n",(__u16) vector, vector_to_string(vector));
235	dump_interrupted_context(istate);	233	dump_interrupted_context(istate);
236	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));	234	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
237	}	235	}
238		236
239	void external_interrupt(__u64 vector, istate_t *istate)	237	void external_interrupt(__u64 vector, istate_t *istate)
240	{	238	{
241	cr_ivr_t ivr;	239	cr_ivr_t ivr;
242		240
243	ivr.value = ivr_read();	241	ivr.value = ivr_read();
244	srlz_d();	242	srlz_d();
245		243
246	switch(ivr.vector) {	244	switch(ivr.vector) {
247	case INTERRUPT_TIMER:	245	case INTERRUPT_TIMER:
248	it_interrupt();	246	it_interrupt();
249	break;	247	break;
250	case INTERRUPT_SPURIOUS:	248	case INTERRUPT_SPURIOUS:
251	printf("cpu%d: spurious interrupt\n", CPU->id);	249	printf("cpu%d: spurious interrupt\n", CPU->id);
252	break;	250	break;
253	default:	251	default:
254	panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);	252	panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
255	break;	253	break;
256	}	254	}
257	}	255	}
258		256
259	void virtual_interrupt(__u64 irq,void *param)	257	void virtual_interrupt(__u64 irq,void *param)
260	{	258	{
261	switch(irq) {	259	switch(irq) {
262	case IRQ_KBD:	260	case IRQ_KBD:
263	if(kbd_uspace) ipc_irq_send_notif(irq);	261	if(kbd_uspace) ipc_irq_send_notif(irq);
264	break;	262	break;
265	default:	263	default:
266	panic("\nUnhandled Virtual Interrupt request %d\n", irq);	264	panic("\nUnhandled Virtual Interrupt request %d\n", irq);
267	break;	265	break;
268	}	266	}
269	}	267	}
270		268
271	/* Reregister irq to be IPC-ready */	269	/* Reregister irq to be IPC-ready */
272	void irq_ipc_bind_arch(__native irq)	270	void irq_ipc_bind_arch(__native irq)
273	{	271	{
274	if(irq==IRQ_KBD) {	272	if(irq==IRQ_KBD) {
275	kbd_uspace=1;	273	kbd_uspace=1;
276	return;	274	return;
277	}	275	}
278	return;	276	return;
279	panic("not implemented\n");	277	panic("not implemented\n");
280	/* TODO */	278	/* TODO */
281	}	279	}
282		280
283	/** @}	281	/** @}
284	*/	282	*/
285		283
286		284

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(root)/kernel/trunk/arch/ia64/src/interrupt.c – Rev 1703 → 1705