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| 1 | /* |
1 | /* |
| 2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| - | 29 | /** @addtogroup ia64cpu ia64 |
|
| - | 30 | * @ingroup cpu |
|
| - | 31 | * @{ |
|
| - | 32 | */ |
|
| - | 33 | /** @file |
|
| - | 34 | */ |
|
| - | 35 | ||
| 29 | #include <cpu.h> |
36 | #include <cpu.h> |
| 30 | #include <arch.h> |
37 | #include <arch.h> |
| 31 | #include <arch/register.h> |
38 | #include <arch/register.h> |
| 32 | #include <print.h> |
39 | #include <print.h> |
| 33 | 40 | ||
| 34 | void cpu_arch_init(void) |
41 | void cpu_arch_init(void) |
| 35 | { |
42 | { |
| 36 | } |
43 | } |
| 37 | 44 | ||
| 38 | void cpu_identify(void) |
45 | void cpu_identify(void) |
| 39 | { |
46 | { |
| 40 | CPU->arch.cpuid0 = cpuid_read(0); |
47 | CPU->arch.cpuid0 = cpuid_read(0); |
| 41 | CPU->arch.cpuid1 = cpuid_read(1); |
48 | CPU->arch.cpuid1 = cpuid_read(1); |
| 42 | CPU->arch.cpuid3.value = cpuid_read(3); |
49 | CPU->arch.cpuid3.value = cpuid_read(3); |
| 43 | } |
50 | } |
| 44 | 51 | ||
| 45 | void cpu_print_report(cpu_t *m) |
52 | void cpu_print_report(cpu_t *m) |
| 46 | { |
53 | { |
| 47 | char *family_str; |
54 | char *family_str; |
| 48 | char vendor[2*sizeof(__u64)+1]; |
55 | char vendor[2*sizeof(__u64)+1]; |
| 49 | 56 | ||
| 50 | *((__u64 *) &vendor[0*sizeof(__u64)]) = CPU->arch.cpuid0; |
57 | *((__u64 *) &vendor[0*sizeof(__u64)]) = CPU->arch.cpuid0; |
| 51 | *((__u64 *) &vendor[1*sizeof(__u64)]) = CPU->arch.cpuid1; |
58 | *((__u64 *) &vendor[1*sizeof(__u64)]) = CPU->arch.cpuid1; |
| 52 | vendor[sizeof(vendor)-1] = '\0'; |
59 | vendor[sizeof(vendor)-1] = '\0'; |
| 53 | 60 | ||
| 54 | switch(m->arch.cpuid3.family) { |
61 | switch(m->arch.cpuid3.family) { |
| 55 | case FAMILY_ITANIUM: |
62 | case FAMILY_ITANIUM: |
| 56 | family_str = "Itanium"; |
63 | family_str = "Itanium"; |
| 57 | break; |
64 | break; |
| 58 | case FAMILY_ITANIUM2: |
65 | case FAMILY_ITANIUM2: |
| 59 | family_str = "Itanium 2"; |
66 | family_str = "Itanium 2"; |
| 60 | break; |
67 | break; |
| 61 | default: |
68 | default: |
| 62 | family_str = "Unknown"; |
69 | family_str = "Unknown"; |
| 63 | break; |
70 | break; |
| 64 | } |
71 | } |
| 65 | 72 | ||
| 66 | printf("cpu%d: %s (%s), archrev=%d, model=%d, revision=%d\n", CPU->id, family_str, vendor, CPU->arch.cpuid3.archrev, CPU->arch.cpuid3.model, CPU->arch.cpuid3.revision); |
73 | printf("cpu%d: %s (%s), archrev=%d, model=%d, revision=%d\n", CPU->id, family_str, vendor, CPU->arch.cpuid3.archrev, CPU->arch.cpuid3.model, CPU->arch.cpuid3.revision); |
| 67 | } |
74 | } |
| - | 75 | ||
| - | 76 | /** @} |
|
| - | 77 | */ |
|
| - | 78 | ||
| 68 | 79 | ||