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| Line 69... | Line 69... | ||
| 69 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
69 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
| 70 | #define AR_READ 0x0 |
70 | #define AR_READ 0x0 |
| 71 | #define AR_EXECUTE 0x1 |
71 | #define AR_EXECUTE 0x1 |
| 72 | #define AR_WRITE 0x2 |
72 | #define AR_WRITE 0x2 |
| 73 | 73 | ||
| - | 74 | ||
| - | 75 | #define VA_REGION_INDEX 61 |
|
| - | 76 | ||
| - | 77 | #define VA_REGION(va) (va>>VA_REGION_INDEX) |
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| - | 78 | ||
| - | 79 | ||
| - | 80 | ||
| 74 | struct vhpt_tag_info { |
81 | struct vhpt_tag_info { |
| 75 | unsigned long long tag : 63; |
82 | unsigned long long tag : 63; |
| 76 | unsigned ti : 1; |
83 | unsigned ti : 1; |
| 77 | } __attribute__ ((packed)); |
84 | } __attribute__ ((packed)); |
| 78 | 85 | ||
| Line 218... | Line 225... | ||
| 218 | * @param v Value to be written to rr[i]. |
225 | * @param v Value to be written to rr[i]. |
| 219 | */ |
226 | */ |
| 220 | static inline void rr_write(index_t i, __u64 v) |
227 | static inline void rr_write(index_t i, __u64 v) |
| 221 | { |
228 | { |
| 222 | ASSERT(i < REGION_REGISTERS); |
229 | ASSERT(i < REGION_REGISTERS); |
| - | 230 | __asm__ volatile ( |
|
| - | 231 | "mov rr[%0] = %1;;\n" |
|
| - | 232 | "srlz.d;;\n" |
|
| - | 233 | : |
|
| 223 | __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v)); |
234 | : "r" (i), "r" (v)); |
| 224 | } |
235 | } |
| 225 | 236 | ||
| 226 | /** Read Page Table Register. |
237 | /** Read Page Table Register. |
| 227 | * |
238 | * |
| 228 | * @return Current value stored in PTA. |
239 | * @return Current value stored in PTA. |