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/*
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/*
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 * Copyright (C) 2005 - 2006 Jakub Jermar
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 * Copyright (C) 2005 Jakub Jermar
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 * Copyright (C) 2006 Jakub Vana
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 */
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 */
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#ifndef __ia64_PAGE_H__
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#ifndef __ia64_PAGE_H__
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#define __ia64_PAGE_H__
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#define __ia64_PAGE_H__
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#include <arch/types.h>
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#include <arch/mm/frame.h>
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#include <arch/mm/frame.h>
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#include <genarch/mm/page_ht.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <debug.h>
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_WIDTH  FRAME_WIDTH
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#define PAGE_WIDTH  FRAME_WIDTH
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#define KA2PA(x)    ((__address) (x))
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#define KA2PA(x)    ((__address) (x))
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#define HT_INVALIDATE_SLOT_ARCH(t)
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#define HT_INVALIDATE_SLOT_ARCH(t)
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#define HT_GET_NEXT_ARCH(t)     0
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#define HT_GET_NEXT_ARCH(t)     0
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#define HT_SET_NEXT_ARCH(t, s)
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#define HT_SET_NEXT_ARCH(t, s)
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#define HT_SET_RECORD_ARCH(t, page, asid, frame, flags)
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#define HT_SET_RECORD_ARCH(t, page, asid, frame, flags)
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#define REGION_RID_MAIN 0
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#define VRN_KERNEL          0
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#define REGION_RID_FIRST_INVALID 16
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#define REGION_REGISTERS 8
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#define REGION_REGISTERS        8
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#define VHPT_WIDTH 16         /*64kB*/
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#define VHPT_WIDTH          20          /* 1M */
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#define VHPT_SIZE (1<<VHPT_WIDTH)
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#define VHPT_SIZE           (1<<VHPT_WIDTH)
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#define VHPT_BASE 0           /* Must be aligned to VHPT_SIZE */
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#define VHPT_BASE           page_ht     /* Must be aligned to VHPT_SIZE */
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struct VHPT_tag_info
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struct vhpt_tag_info {
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{
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    unsigned long long tag       :63;
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    unsigned long long tag : 63;
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    unsigned           ti        : 1;
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    unsigned ti : 1;
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}__attribute__ ((packed));
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} __attribute__ ((packed));
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union VHPT_tag
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union vhpt_tag {
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{
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    struct VHPT_tag_info tag_info;
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    struct vhpt_tag_info tag_info;
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    unsigned             tag_word;
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    unsigned tag_word;
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};
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};
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struct VHPT_entry_present
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struct vhpt_entry_present {
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{
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    /* Word 0 */
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    /* Word 0 */
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    unsigned p              : 1;
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    unsigned p : 1;
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    unsigned rv0            : 1;
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    unsigned : 1;
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    unsigned ma             : 3;
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    unsigned ma : 3;
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    unsigned a              : 1;
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    unsigned a : 1;
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    unsigned d              : 1;
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    unsigned d : 1;
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    unsigned pl             : 2;
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    unsigned pl : 2;
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    unsigned ar             : 3;
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    unsigned ar : 3;
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    unsigned long long ppn  :38;
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    unsigned long long ppn : 38;
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    unsigned rv1            : 2;
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    unsigned : 2;
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    unsigned ed             : 1;
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    unsigned ed : 1;
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    unsigned ig1            :11;
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    unsigned ig1 : 11;
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    /* Word 1 */
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    /* Word 1 */
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    unsigned rv2            : 2;
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    unsigned : 2;
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    unsigned ps             : 6;
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    unsigned ps : 6;
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    unsigned key            :24;
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    unsigned key : 24;
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    unsigned rv3            :32;
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    unsigned : 32;
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    /* Word 2 */
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    /* Word 2 */
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    union VHPT_tag tag;       /*This data is here as union because I'm not sure if anybody nead access to areas ti and tag in VHPT entry*/
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                            /* But I'm almost sure we nead access to whole word so there are both possibilities*/
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    /* Word 3 */                                                   
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    union vhpt_tag tag;
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    unsigned long long next :64; /* This ignored field will be (in my hopes ;-) ) used as pointer in link list of entries with same hash value*/
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    /* Word 3 */                                                   
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    unsigned long long next : 64;   /**< Collision chain next pointer. */
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}__attribute__ ((packed));
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} __attribute__ ((packed));
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102
 
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struct VHPT_entry_not_present
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struct vhpt_entry_not_present {
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{
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    /* Word 0 */
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    /* Word 0 */
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    unsigned p              : 1;
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    unsigned p : 1;
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    unsigned long long ig0  :52;
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    unsigned long long ig0 : 52;
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    unsigned ig1            :11;
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    unsigned ig1 : 11;
111
   
108
   
112
    /* Word 1 */
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    /* Word 1 */
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    unsigned rv2            : 2;
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    unsigned : 2;
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    unsigned ps             : 6;
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    unsigned ps : 6;
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    unsigned long long ig2  :56;
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    unsigned long long ig2 : 56;
116
 
113
 
117
   
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    /* Word 2 */
114
    /* Word 2 */
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    union VHPT_tag tag;       /*This data is here as union because I'm not sure if anybody nead access to areas ti and tag in VHPT entry*/
115
    union vhpt_tag tag;
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                            /* But I'm almost sure we nead access to whole word so there are both possibilities*/
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121
    /* Word 3 */                                                   
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    /* Word 3 */                                                   
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    unsigned long long next :64; /* This ignored field will be (in my hopes ;-) ) used as pointer in link list of entries with same hash value*/
118
    unsigned long long next : 64;   /**< Collision chain next pointer. */
123
   
119
   
124
}__attribute__ ((packed));
120
} __attribute__ ((packed));
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121
 
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122
typedef union vhpt_entry {
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    struct vhpt_entry_present present;
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124
    struct vhpt_entry_not_present not_present;
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125
} vhpt_entry;
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126
 
-
 
127
struct region_register_map {
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    unsigned ve : 1;
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    unsigned : 1;
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130
    unsigned ps : 6;
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131
    unsigned rid : 24;
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    unsigned : 32;
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133
} __attribute__ ((packed));
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134
 
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typedef union region_register {
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    struct region_register_map map;
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    unsigned long long word;
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138
} region_register;
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struct pta_register_map {
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    unsigned ve : 1;
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    unsigned : 1;
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    unsigned size : 6;
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    unsigned vf : 1;
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    unsigned : 6;
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    unsigned long long base : 49;
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} __attribute__ ((packed));
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typedef union pta_register {
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    struct pta_register_map map;
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    __u64 word;
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152
} pta_register;
125
 
153
 
126
typedef union VHPT_entry
154
/** Return Translation Hashed Entry Address.
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155
 *
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156
 * VRN bits are used to read RID (ASID) from one
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 * of the eight region registers registers.
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 *
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 * @param va Virtual address including VRN bits.
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 *
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 * @return Address of the head of VHPT collision chain.
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162
 */
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static inline __u64 thash(__u64 va)
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{
164
{
128
    struct VHPT_entry_present        present;
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    struct VHPT_entry_not_present    not_present;
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}VHPT_entry;
165
    __u64 ret;
131
 
166
 
132
extern void page_arch_init(void);
167
    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
133
 
168
 
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169
    return ret;
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170
}
134
 
171
 
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172
/** Return Translation Hashed Entry Tag.
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173
 *
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174
 * VRN bits are used to read RID (ASID) from one
135
struct region_register_map
175
 * of the eight region registers.
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176
 *
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177
 * @param va Virtual address including VRN bits.
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178
 *
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179
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
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180
 */
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static inline __u64 ttag(__u64 va)
136
{
182
{
137
  unsigned ve            : 1;
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    unsigned r0            : 1;
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    unsigned ps            : 6;
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    unsigned rid           :24;
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    unsigned r1            :32;
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}__attribute__ ((packed));
183
    __u64 ret;
143
 
184
 
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185
    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
144
 
186
 
145
typedef union region_register
187
    return ret;
146
{
188
}
147
    struct region_register_map   map;
-
 
148
    unsigned long long           word;
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149
}region_register;
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189
 
151
struct PTA_register_map
190
/** Read Region Register.
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191
 *
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192
 * @param i Region register index.
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193
 *
-
 
194
 * @return Current contents of rr[i].
-
 
195
 */
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196
static inline __u64 rr_read(index_t i)
152
{
197
{
153
  unsigned ve            : 1;
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154
    unsigned r0            : 1;
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155
    unsigned size          : 6;
198
    __u64 ret;
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199
   
156
    unsigned vf            : 1;
200
//  ASSERT(i < REGION_REGISTERS);
157
    unsigned r1            : 6;
201
    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
158
    unsigned long long base:49;
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202
   
159
}__attribute__ ((packed));
203
    return ret;
-
 
204
}
160
 
205
 
161
 
206
 
162
typedef union PTA_register
207
/** Write Region Register.
-
 
208
 *
-
 
209
 * @param i Region register index.
-
 
210
 * @param v Value to be written to rr[i].
-
 
211
 */
-
 
212
static inline void rr_write(index_t i, __u64 v)
-
 
213
{
-
 
214
//  ASSERT(i < REGION_REGISTERS);
-
 
215
    __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v));
-
 
216
}
-
 
217
 
-
 
218
/** Read Page Table Register.
-
 
219
 *
-
 
220
 * @return Current value stored in PTA.
-
 
221
 */
-
 
222
static inline __u64 pta_read(void)
-
 
223
{
-
 
224
    __u64 ret;
-
 
225
   
-
 
226
    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
-
 
227
   
-
 
228
    return ret;
-
 
229
}
-
 
230
 
-
 
231
/** Write Page Table Register.
-
 
232
 *
-
 
233
 * @param v New value to be stored in PTA.
-
 
234
 */
-
 
235
static inline void pta_write(__u64 v)
163
{
236
{
164
    struct PTA_register_map   map;
-
 
165
    unsigned long long        word;
237
    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
166
}PTA_register;
238
}
167
 
239
 
-
 
240
extern void page_arch_init(void);
168
 
241
 
169
#endif
242
#endif